Commit graph

24 commits

Author SHA1 Message Date
David Given 2cc2c0ae98 Lots more opcodes. Rearrange the stack layout so that fp->ab is a fixed value
(needed for CHAINFP and FPTOAB). Wire up lfrs to calls via a phi when
necessary, to allow call-bra-lfr chains.
2016-10-29 11:57:56 +02:00
David Given 658db4ba71 Mangle label names (turns out that the ACK assembler can't really cope with
labels that are the same name as instructions...).
2016-10-27 23:17:16 +02:00
David Given f851ab83af Better (and more correct) floating point conversions; fif; various new opcodes. 2016-10-22 00:48:26 +02:00
David Given d535be87b1 fef4 and fef8 is now cleaner, albeit slower; add some more register alias
stuff.
2016-10-22 00:02:15 +02:00
David Given 4db402f229 Add (pretty crummy) support for register aliases and static pairs of registers.
We should have enough functionality now for rather buggy 8-bit ints and
doubles. Rework the table and the platform.c to match.
2016-10-21 23:31:00 +02:00
David Given b36897c299 References to the stack frame are now rendered properly. 2016-10-15 23:33:30 +02:00
David Given 7aa60a6451 Register spilling to the stack frame works, more or less. 2016-10-15 22:53:56 +02:00
David Given 9504aec2bd Function termination gets routed through an exit block; we now have prologues
and epilogues. mcgg now exports some useful data as headers. Start factoring
out some of the architecture-specific bits into an architecture-specific file.
2016-10-15 18:38:46 +02:00
David Given 517120d0fb Allow asm names for registers which are different from the friendly names shown
in the tracing (because PowerPC register names are just numbers).
2016-10-15 11:42:47 +02:00
David Given bb17aea73a You can now mark a register as corrupting a certain register class; calls work,
or at least look like they work. The bad news is that the register allocator
has a rare talent for putting things in the wrong register.
2016-10-15 01:15:08 +02:00
David Given 886adb86d7 Log empty hops. 2016-10-14 23:19:25 +02:00
David Given e93c58dc8d Refactored the way hops are rendered; add support for emitting code (although
with no prologue or epilogue yet).
2016-10-11 00:12:11 +02:00
David Given 92bd1ac5f4 Register allocator now gets all the way through all of my test file without
crashing (albeit with register moves and swaps stubbed out). Correct code? Who
knows.
2016-10-10 23:19:46 +02:00
David Given d75cc0a663 Basic register allocation works! 2016-10-08 23:32:54 +02:00
David Given 9ebf731335 Minor cleanup. 2016-10-08 11:07:28 +02:00
David Given 4e49830e09 Overhaul of everything phi related; critical edge splitting now happens before
anything SSA happens; liveness calculations now look like they might be
working.
2016-10-08 00:21:23 +02:00
David Given 88fb231d6e Better constraint syntax; mcgg now passes register usage information up to mcg;
mcg can track individual hop inputs and outputs (needed for live range
analysis!); the register allocator now puts the basic blocks into the right
order in preparation for live range analysis.
2016-10-05 22:56:25 +02:00
David Given 7a6fc7a72b Made sure that all files end in vim magic. 2016-10-05 21:07:29 +02:00
David Given 288ee56203 Get quite a long way towards basic output-register equality constraints (needed
to make special nodes like NOP work properly). Realise that the way I'm dealing
with the instruction selector is all wrong; I need to physically copy chunks of
tree to give to burg (so I can terminate them correctly).
2016-10-02 23:25:54 +02:00
David Given 91e277e046 Predicates work; we now have prefers and requires clauses. Predicates must be
functions. Not convinced that semantic types are actually working --- there are
still problems with earlier statements leaving things in the wrong registers.
2016-10-01 13:56:52 +02:00
David Given 0d246c0d73 Much better handling of fragments (no run-time code needed to distinguish them
from registers) and better handling of individual hops within a paragraph ---
no more ghastly hacks to try and distinguish the input from the output.
2016-09-29 22:06:04 +02:00
David Given 4572f1b774 Actually, I don't need vregs: hops work just as well. Particularly if I
restructure things so that I don't need to walk the blasted ir / burg tree
every time I look at an instruction.
2016-09-27 23:38:47 +02:00
David Given e77c5164cf Fleshed out hops and vregs. The result is almost looking like code now ---
uncanny.
2016-09-27 00:19:45 +02:00
David Given 416b13fd76 Start factoring out the hardware op code. 2016-09-25 23:29:59 +02:00