David Given
68f98cbad7
Instruction selection now happens on a shadow tree, rather than on the IR tree
...
itself. Currently it's semantically the same but the implementation is cleaner.
2016-10-03 20:52:36 +02:00
David Given
288ee56203
Get quite a long way towards basic output-register equality constraints (needed
...
to make special nodes like NOP work properly). Realise that the way I'm dealing
with the instruction selector is all wrong; I need to physically copy chunks of
tree to give to burg (so I can terminate them correctly).
2016-10-02 23:25:54 +02:00
David Given
a3cfe6047f
More rigorous dealing of IR groups; no need for is_generated and is_root any
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more (but now passes are required to set IR roots properly when changing
instructions).
2016-10-01 22:58:29 +02:00
David Given
91e277e046
Predicates work; we now have prefers and requires clauses. Predicates must be
...
functions. Not convinced that semantic types are actually working --- there are
still problems with earlier statements leaving things in the wrong registers.
2016-10-01 13:56:52 +02:00
David Given
0d246c0d73
Much better handling of fragments (no run-time code needed to distinguish them
...
from registers) and better handling of individual hops within a paragraph ---
no more ghastly hacks to try and distinguish the input from the output.
2016-09-29 22:06:04 +02:00
David Given
a0131fdb47
You know what, the type inference stuff is a complete red herring. What this
...
actually needs is a more intelligent register allocator. So, remove the type
inference.
2016-09-29 19:58:02 +02:00
David Given
e77c5164cf
Fleshed out hops and vregs. The result is almost looking like code now ---
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uncanny.
2016-09-27 00:19:45 +02:00
David Given
cc176e5183
Keep more data around about ir instructions. Implement a half-baked type
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inference routine to propagate information about floats up the tree, so we know
whether to put floats into special registers as early as possible.
2016-09-26 22:12:46 +02:00
David Given
416b13fd76
Start factoring out the hardware op code.
2016-09-25 23:29:59 +02:00
David Given
39aa672422
Sort of keep track of registers and register classes. Start walking the
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generated instruction tree --- holy cow, they look like instructions!
2016-09-25 22:17:14 +02:00
David Given
629e0ddfc6
Some instruction selection is now happening.
2016-09-24 22:46:08 +02:00
David Given
ed67d427c9
Replaced the block splicer with a trivial block eliminator (which rewrites
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jumps to blocks which contain only a jump). Don't bother storing the bb graph
in the ir nodes; we can find it on demand by walking the tree instead ---
slower, but much easier to understand and more robust. Added a terrible map
library.
2016-09-23 23:59:15 +02:00
David Given
9077baa850
Add a bodged in algorithm for converting basic block communication from stacked
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variables to SSA. Also add dead block removal and block splicing. IR code is
much better now.
2016-09-22 23:19:29 +02:00
David Given
6a74cb2e11
Tracing cleanup. Simplified the IR code. Some more opcodes.
2016-09-22 00:15:48 +02:00
David Given
6ce2495aeb
Store the EM code up front and build the basic block graph *before*
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generating the IR code. Lots more IR code.
2016-09-19 23:06:59 +02:00
David Given
176cd7365c
Archival checking of the half-written IR treebuilder.
2016-09-18 23:24:54 +02:00
