Commit graph

21 commits

Author SHA1 Message Date
David Given 68f98cbad7 Instruction selection now happens on a shadow tree, rather than on the IR tree
itself. Currently it's semantically the same but the implementation is cleaner.
2016-10-03 20:52:36 +02:00
David Given 288ee56203 Get quite a long way towards basic output-register equality constraints (needed
to make special nodes like NOP work properly). Realise that the way I'm dealing
with the instruction selector is all wrong; I need to physically copy chunks of
tree to give to burg (so I can terminate them correctly).
2016-10-02 23:25:54 +02:00
David Given 3aa30e50d1 Come up with a syntax for register constraints. 2016-10-02 21:51:25 +02:00
David Given c079e97492 Perform SSA conversion of locals. Much, *much* better code now, at least
inasmuch as it looks better before register allocation. Basic blocks now know
their own successors and predecessors (after a certain point in the IR
processing).
2016-10-02 17:50:34 +02:00
David Given 06059233da Make betterer. 2016-10-01 23:41:45 +02:00
David Given 21898f784a We're going to need some type inference after all, I think. Let's do a little
for now and see how it goes.
2016-10-01 19:10:22 +02:00
David Given 91e277e046 Predicates work; we now have prefers and requires clauses. Predicates must be
functions. Not convinced that semantic types are actually working --- there are
still problems with earlier statements leaving things in the wrong registers.
2016-10-01 13:56:52 +02:00
David Given 4a3a9a98dc It doesn't really make a lot of sense to have BURG nonterminal names different
to register classes, so combine them. Refactor the map code.
2016-10-01 12:17:14 +02:00
David Given 3a973a19f3 Move fatal(), warning() and aprintf() into the new data module (because they're
really useful).
2016-09-30 19:10:30 +02:00
David Given 0d246c0d73 Much better handling of fragments (no run-time code needed to distinguish them
from registers) and better handling of individual hops within a paragraph ---
no more ghastly hacks to try and distinguish the input from the output.
2016-09-29 22:06:04 +02:00
David Given a0131fdb47 You know what, the type inference stuff is a complete red herring. What this
actually needs is a more intelligent register allocator. So, remove the type
inference.
2016-09-29 19:58:02 +02:00
David Given 4572f1b774 Actually, I don't need vregs: hops work just as well. Particularly if I
restructure things so that I don't need to walk the blasted ir / burg tree
every time I look at an instruction.
2016-09-27 23:38:47 +02:00
David Given e77c5164cf Fleshed out hops and vregs. The result is almost looking like code now ---
uncanny.
2016-09-27 00:19:45 +02:00
David Given 39aa672422 Sort of keep track of registers and register classes. Start walking the
generated instruction tree --- holy cow, they look like instructions!
2016-09-25 22:17:14 +02:00
David Given bde5792b1a Collapse several rule arrays into one; actually generate the array properly. 2016-09-25 17:14:54 +02:00
David Given 9f78e0b36b Rethink the way patterns are mapped to rules; generate emitters (probably
badly).
2016-09-25 11:49:51 +02:00
David Given 7c028bdd45 We now record the code fragments to be emitted by each rule. 2016-09-25 00:21:46 +02:00
David Given 629e0ddfc6 Some instruction selection is now happening. 2016-09-24 22:46:08 +02:00
David Given c8fcbe282a More grammar changes. 2016-09-24 19:03:55 +02:00
David Given 2acc4ed29d IR codes are now owned by mcgg; ir terminals are inserted into the table during
compilation (so you can refer to them).
2016-09-24 18:31:35 +02:00
David Given 1516657907 Crudely bolt on mcgg to mcg itself. 2016-09-24 17:20:40 +02:00