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Author SHA1 Message Date
David Given
e13ff5be31 Don't allocate new vregs for REG and NOP --- a bit hacky, but suppresses stray 
movs very effectively.
 2016-10-04 21:29:03 +02:00
David Given
bd28bddb92 Massive rewrite of how emitters and the instruction selector works, after I 
realised that the existing approach wasn't working. Now, hopefully, tracks the
instruction trees generated during selection properly.
 2016-10-04 00:16:06 +02:00
David Given
68f98cbad7 Instruction selection now happens on a shadow tree, rather than on the IR tree 
itself. Currently it's semantically the same but the implementation is cleaner.
 2016-10-03 20:52:36 +02:00
David Given
288ee56203 Get quite a long way towards basic output-register equality constraints (needed 
to make special nodes like NOP work properly). Realise that the way I'm dealing
with the instruction selector is all wrong; I need to physically copy chunks of
tree to give to burg (so I can terminate them correctly).
 2016-10-02 23:25:54 +02:00
David Given
3aa30e50d1 Come up with a syntax for register constraints. 2016-10-02 21:51:25 +02:00
David Given
c079e97492 Perform SSA conversion of locals. Much, *much* better code now, at least 
inasmuch as it looks better before register allocation. Basic blocks now know
their own successors and predecessors (after a certain point in the IR
processing).
 2016-10-02 17:50:34 +02:00
David Given
79d4ab1d96 Add zrl opcode. Keep track of local sizes as well as offsets. 2016-10-02 16:08:46 +02:00
David Given
bf73fcdb64 Add inl and del opcodes. 2016-10-02 14:44:21 +02:00
David Given
b298c27c63 Refactor mcg.h as it's getting a bit big; keep track of register variables. 2016-10-02 00:30:33 +02:00
David Given
06059233da Make betterer. 2016-10-01 23:41:45 +02:00
David Given
65e75be42d Fix edge case where leftover pushes would occasionally cause infinite loops in 
the analysis.
 2016-10-01 23:41:35 +02:00
David Given
73d7e89c32 Show expression trees correctly. 2016-10-01 23:41:03 +02:00
David Given
3474e20274 Deal with malformed mes instructions emitted by ego. 2016-10-01 23:13:39 +02:00
David Given
a3cfe6047f More rigorous dealing of IR groups; no need for is_generated and is_root any 
more (but now passes are required to set IR roots properly when changing
instructions).
 2016-10-01 22:58:29 +02:00
David Given
21898f784a We're going to need some type inference after all, I think. Let's do a little 
for now and see how it goes.
 2016-10-01 19:10:22 +02:00
David Given
91e277e046 Predicates work; we now have prefers and requires clauses. Predicates must be 
functions. Not convinced that semantic types are actually working --- there are
still problems with earlier statements leaving things in the wrong registers.
 2016-10-01 13:56:52 +02:00
David Given
4a3a9a98dc It doesn't really make a lot of sense to have BURG nonterminal names different 
to register classes, so combine them. Refactor the map code.
 2016-10-01 12:17:14 +02:00
George Koehler
ce5faba919 Remove .linenumber and .filename; use hol0 and hol0+4. 
We need this because some .e files in lang/ are using 'loe 0' and 'lae
4' to load the line number from hol0 and filename from hol0+4.
 2016-09-30 13:40:36 -04:00
David Given
3a973a19f3 Move fatal(), warning() and aprintf() into the new data module (because they're 
really useful).
 2016-09-30 19:10:30 +02:00
George Koehler
e22c8881e7 Add a rule for sdl ldl $1==$2 to work around a bug. 
In our powerpc table, sdl fails to kill the old value of the local.
This is a bug, because a later ldl can load the old value instead of
the newly stored value.  By rewriting "sdl 0" "ldl 0" as "dup 8" "sdl
0", the newly added rule works around the bug, but only when the ldl
is immediately after the sdl.

This rule improves code that uses double-precision floating point.
The output of printf("%f", 6.0) in C changes from all zero digits to
"6000000" but still doesn't print the decimal point.  The result of
atof("-123.456") becomes correct.  In startrek, I can now move the
Enterprise, but I still can't fire phasers without crashing the game.

We already have a rule for stl lol $1==$2.  We had two copies of the
rule, so I am deleting the second copy.
 2016-09-30 11:50:50 -04:00
David Given
0d246c0d73 Much better handling of fragments (no run-time code needed to distinguish them 
from registers) and better handling of individual hops within a paragraph ---
no more ghastly hacks to try and distinguish the input from the output.
 2016-09-29 22:06:04 +02:00
George Koehler
6ae415d48b Rewrite fef 8 in powerpc assembly. 
In EM, fef splits a float into exponent and fraction.  The old C code,
given an infinite float, got stuck in an infinite loop.  The new
assembly code doesn't loop; it extracts the IEEE exponent.
 2016-09-29 15:52:54 -04:00
David Given
a0131fdb47 You know what, the type inference stuff is a complete red herring. What this 
actually needs is a more intelligent register allocator. So, remove the type
inference.
 2016-09-29 19:58:02 +02:00
George Koehler
a71eee3914 For "pat ass", move fake stack to real stack before adjusting SP. 
This fixes code that tried to "addi SP, SP, 4" to drop a value that
was in a register, not on the real stack.

Add a rule to optimize "asp 4" (which becomes "loc 4" "ass") when
the value being dropped is already in a GPR.
 2016-09-28 00:13:35 -04:00
David Given
4572f1b774 Actually, I don't need vregs: hops work just as well. Particularly if I 
restructure things so that I don't need to walk the blasted ir / burg tree
every time I look at an instruction.
 2016-09-27 23:38:47 +02:00
George Koehler
1e3dde915a Remove the "invalid" stacking rule. 
When ncg fell back on this rule, it did emit the string "invalid" in
the assembly code and caused a syntax error in the assembler.

Adjust the stacking rules so we can stack LOCAL, CONST, and LABEL
without falling back on the "invalid" rule, and so we can stack them
when we have no free register except the scratch register.
 2016-09-27 16:46:11 -04:00
David Given
e77c5164cf Fleshed out hops and vregs. The result is almost looking like code now --- 
uncanny.
 2016-09-27 00:19:45 +02:00
David Given
f552c9c7c6 Move map into the data module. 2016-09-26 23:03:04 +02:00
David Given
c4b8e00ae2 Revamp the array module not to use nasty macros any more. Slightly more verbose 
to use, but definitely cleaner.
 2016-09-26 22:48:58 +02:00
David Given
3671892c34 Move the array library into the data module. 2016-09-26 22:24:49 +02:00
David Given
cc176e5183 Keep more data around about ir instructions. Implement a half-baked type 
inference routine to propagate information about floats up the tree, so we know
whether to put floats into special registers as early as possible.
 2016-09-26 22:12:46 +02:00
David Given
416b13fd76 Start factoring out the hardware op code. 2016-09-25 23:29:59 +02:00
David Given
39aa672422 Sort of keep track of registers and register classes. Start walking the 
generated instruction tree --- holy cow, they look like instructions!
 2016-09-25 22:17:14 +02:00
David Given
bde5792b1a Collapse several rule arrays into one; actually generate the array properly. 2016-09-25 17:14:54 +02:00
David Given
67eb21d428 Rename struct insn to struct em (throughout). 2016-09-25 12:29:03 +02:00
David Given
9f78e0b36b Rethink the way patterns are mapped to rules; generate emitters (probably 
badly).
 2016-09-25 11:49:51 +02:00
David Given
7c028bdd45 We now record the code fragments to be emitted by each rule. 2016-09-25 00:21:46 +02:00
David Given
717b77dd0a Instruction selection is so important the file needs a longer name. 2016-09-24 22:50:53 +02:00
David Given
629e0ddfc6 Some instruction selection is now happening. 2016-09-24 22:46:08 +02:00
David Given
c8fcbe282a More grammar changes. 2016-09-24 19:03:55 +02:00
David Given
2acc4ed29d IR codes are now owned by mcgg; ir terminals are inserted into the table during 
compilation (so you can refer to them).
 2016-09-24 18:31:35 +02:00
David Given
1516657907 Crudely bolt on mcgg to mcg itself. 2016-09-24 17:20:40 +02:00
David Given
6643d39b2c Fix some late-night typo bugs. 2016-09-24 01:09:32 +02:00
David Given
bb9aa030a5 Procedure compilation now happens after the entire EM file has been read in (so 
that we can look inside data blocks which might be defined in the future...
sigh, csa and csb). csa and csb no longer generate invalid IR.
 2016-09-24 01:04:00 +02:00
David Given
ed67d427c9 Replaced the block splicer with a trivial block eliminator (which rewrites 
jumps to blocks which contain only a jump). Don't bother storing the bb graph
in the ir nodes; we can find it on demand by walking the tree instead ---
slower, but much easier to understand and more robust. Added a terrible map
library.
 2016-09-23 23:59:15 +02:00
David Given
f8bbf9e87d Each pass now lives in its own source file; much cleaner. 2016-09-23 21:07:16 +02:00
David Given
9077baa850 Add a bodged in algorithm for converting basic block communication from stacked 
variables to SSA. Also add dead block removal and block splicing. IR code is
much better now.
 2016-09-22 23:19:29 +02:00
David Given
6a74cb2e11 Tracing cleanup. Simplified the IR code. Some more opcodes. 2016-09-22 00:15:48 +02:00
David Given
4546dd5f22 Massive grammar overhaul and refactor. Hacked in support for predicates, where 
instructions can be turned on and off based on their parameters. New lexer
using a lexer. Now quite a lot of the way towards being a real instruction
selector.
 2016-09-21 00:43:10 +02:00
David Given
36d7d1ee4e Create hacky fake basic blocks for data fragments, used to track which 
instruction labels descriptor blocks refer to; this allows csa and csb to know
where they're going.
 2016-09-20 00:19:39 +02:00