Commit graph

545 commits

Author SHA1 Message Date
George Koehler 307a8b996e Add regvar_w() and regvar_d() for use with reglap.
If the ncg table uses reglap, then regvar($1, reg_float) would have
two sizes of registers.  An error from ncgg would happen if regvar()
was in a token that allows only one size.  Now one can pick a size
with regvar_w() for word size or regvar_d() for double-word size.

Add regvar_d and regvar_w as keywords in ncgg.  Modify EX_REGVAR to
include the register size.  In ncg, add some checks for the register
size.  In tables without reglap, regvar() works as before, and ncg
ignores the register size in EX_REGVAR.
2017-10-17 12:05:41 -04:00
George Koehler aa876ff4c2 Fix reglap for procedures that use both sizes of reg_float.
After the RA phase of ego, a procedure may put single-word and
double-word values in the same reg_float.  Then ncg will use both
LOCAL and DLOCAL tokens at the same offset.

I add isregvar_size() to ncg.  It receives the size of the LOCAL or
DLOCAL token, and picks the register of the correct size.  This fixes
a problem where ncg got the wrong-size register and corrupted the
stack.  This problem caused one of my test programs to segfault from
stack underflow.

Also adjust how fixregvars() handles both sizes.
2017-10-15 13:15:03 -04:00
George Koehler b342b83d28 Add function prototypes to mach/proto/ncg/regvar.c 2017-10-15 11:01:18 -04:00
George Koehler d6e9eac785 Merge branch 'default' into kernigh-linuxppc
This merges several fixes and improvements from upstream.  This
includes commit 5f6a773 to turn off qemuppc.  I see several failing
tests from qemuppc; this merge will hide the test failures.
2017-10-14 13:50:49 -04:00
George Koehler 7e9348169c Add reglap to ncg. Add 4-byte reg_float to PowerPC ncg.
The new feature "reglap" allows two sizes of floating-point register
variables (reg_float), if each register overlaps a single register of
the other size.  PowerPC ncg uses reglap to define 4-byte instances
of f14 to f31 that overlap the 8-byte instances.

When ncgg sees the definition of fs14("f14")=f14, it removes the
8-byte f14 from its rvnumbers array, and adds the 4-byte fs14 in its
place.  Later, when ncg puts a variable in fs14, if it is an 8-byte
variable, then ncg switches to the 8-byte f14.  The code has
/* reglap */ comments in util/ncgg or #ifdef REGLAP in mach/proto/ncg

reglap became necessary because my commit a20b87c caused PowerPC ego
to allocate reg_float in both 4-byte and 8-byte sizes.
2017-10-14 12:40:04 -04:00
David Given 64f2fa9d46 Stop using mktemp() --- on Haiku, it always generates the same filenames,
pretty much guaranteeing temporary file overwrites on parallel builds. Use
mkstemp() instead which creates the files atomically.
2017-08-06 13:22:05 +02:00
George Koehler aa47f52166 Switch error() and fatal() in mach/proto/ncg to stdarg.
This is like David Given's change to util/ncgg in d89f172.  I need
this change in mach/proto/ncg to see fatal messages, because a 64-bit
pointer doesn't fit in an int.
2017-02-16 20:26:53 -05:00
David Given d7df126730 Merge pull request #44 from kernigh/kernigh-pr-as
mach/proto/as: allow more tokens
2017-01-18 23:33:40 +01:00
George Koehler f705339f86 Allow more tokens in the assembler.
I need this so I can add more %token lines to mach/powerpc/as/mach2.c

The assembler's tempfile encoded each token in a byte.  This only
worked with tokens 0 to 127 and 256 and 383.  If a token 384 or higher
existed, the assembler stopped working.  I need tokens 384 and higher.

I change the token encoding to a 2-byte little-endian integer.  I also
change a byte in the string encoding.
2017-01-17 22:41:11 -05:00
George Koehler ba2a03705e Use prototypes in mach/proto/as/comm5.c
Order the function prototypes in comm1.h to match the order of the
function definitions in *.c files.
2017-01-17 16:41:29 -05:00
David Given 81c677d218 Add a bunch more set operations to the PowerPC backends, and the Pascal test
for the same.
2017-01-17 22:31:38 +01:00
George Koehler 916d270534 Delay inclusion of <stdint.h> when compiling comm2.y
See issue #1 (https://github.com/davidgiven/ack/issues/1).  The file
mach/proto/as/comm2.y goes through cpp twice.  The _include macro,
defined in comm2.y and used in comm0.h, delays the inclusion of system
header files.  The inclusion of <stdint.h> wasn't delayed.  This
caused multiple inclusions of <sys/_types.h> in FreeBSD and
<machine/_types.h> in OpenBSD.

Use _include to delay <stdint.h>.  Also use _include for "arch.h" and
"out.h", because h/out.h includes <stdint.h> and h/arch.h might
include it in the future.

Sort the system includes in comm0.h by moving them up to be with
<stdint.h>.  Must include <stdint.h> before "mach0.c", because
mach/powerpc/as/mach0.c needs it.  Must include "mach0.c" before
checking ASLD.
2017-01-16 22:39:44 -05:00
George Koehler e97116c037 Remove some obsolete code that causes a gcc warning.
In my OpenBSD/amd64 system, the code becomes

    if (0)
        outname.on_valu &= ~(((0xFFFFFFFF)<<32)<<32);

The 0xFFFFFFFF is a 32-bit int, so the left shift by 32 is out of
range and causes the gcc warning.

The intent might be to clear any sign-extended bits, if the assignment
outname.on_valu = valu did sign extension.  Old C had no unsigned
long, so .on_valu would have been long.  The code is obsolete because
h/out.h now declares .on_valu as uint32_t.
2017-01-16 18:09:55 -05:00
David Given c471f617b7 Ensure that memory is zero-initialised. 2017-01-16 22:45:03 +01:00
David Given 2cdcc16bc2 Fix a buffer overrun that was manifesting on OpenBSD; also fix a bounds check and some uninitialised variable problems. 2017-01-16 22:44:37 +01:00
David Given fa5675d439 Run through clang-format. 2017-01-16 21:16:33 +01:00
David Given e7e29d34ff Add a test (currently failing) to check that Pascal char sets can store all 256
possible values. Add the PowerPC ncg and mcg backend support to let the test
actually run, including modifying a bunch of PowrePC libem functions so that
they can be called from both ncg and mcg.
2017-01-15 22:28:14 +01:00
David Given efab08178b Fix a bunch of issues with pushing and popping mismatched sizes, which the B
compiler does a lot; dup 8 for pairs of words is now optimised.
2017-01-07 18:47:00 +01:00
David Given 7710c76d56 Introduce sequence points before store instructions to prevent loads from the
same address being delayed until after the store (at which point they'll return
the wrong value).
2017-01-07 13:17:39 +01:00
David Given fbd6e8f63d Add support for consecutive labels; needed by the B compiler. 2016-11-27 21:18:00 +01:00
David Given 953c08839f inn works now; add a helper for it. 2016-11-20 12:53:44 +01:00
David Given 196fa914b3 lxa now works, I hope; traps are better (and stubbed out on qemuppc). 2016-11-20 11:57:21 +01:00
David Given d5328492d7 Better handling of float conversions; more tests; converting to unsigned ints
works now.
2016-11-20 11:27:40 +01:00
David Given cc660b230f Floats and doubles are now written out correctly. 2016-11-19 11:39:13 +01:00
David Given d31bc6a3f9 Made csa and csb work with mcg; adjust the libem functions and the
corresponding invocation in the ncg table so the same helpers can be used for
both mcg and ncg. Add a new IR opcode, FARJUMP, which jumps to a helper
function but saves volatile registers.
2016-11-19 10:55:41 +01:00
David Given 43439c6d0c Remember to push the result of lor onto the stack. 2016-11-17 22:04:32 +01:00
David Given 81bc2c74c5 A bb's regsin are no longer the same as those of its first instruction;
occasionally the first hop of a block would try to rearrange its registers (due
to evicted throughs), resulting in the phi moves copying values into the wrong
registers.
2016-11-16 20:52:15 +01:00
David Given 581fa4a457 Reenable eviction of corrupted registers, which had been broken by a previous
change. Change the register move code to get swaps right, or at least righter.
2016-11-15 21:55:10 +01:00
David Given 0289b1004e Allow values left on the stack at the end of the procedure (it's legal!). 2016-11-14 21:47:49 +01:00
David Given e7132183fb Fix buffer overrun: if LABEL_STARTER is seen but LABEL_TERMINATOR is not, the
label parser will keep going forever looking for the end of the label. It now
stops at the end of the string.
2016-11-13 14:04:58 +01:00
David Given 852d3a691d Update the table to return call output values in the right registers. Fix the
register allocator so the corrupted registers only apply to throughs
(otherwise, you can't put output registers in corrupted registers).
2016-11-11 21:48:36 +01:00
David Given b5c1d622f5 Rework the way stack frames are laid out to be simpler and, hopefully, more
correct. Saved registers are now placed in what may be the right place.
2016-11-11 21:17:45 +01:00
David Given 84ee75ec07 Merge from default. 2016-11-11 20:17:54 +01:00
David Given d82df74a7a Rename addr_t to address_t to avoid clashes with the system addr_t. 2016-11-11 20:17:10 +01:00
David Given fd91851005 Add enough return types to the K&R C that the ACK builds (on Linux) using clang
now.
2016-11-10 22:04:18 +01:00
David Given 4fa2c94a4a Correctly mangle labels used in initialisers. 2016-10-31 23:21:33 +01:00
David Given e19850b114 Fix a few c11isms. 2016-10-30 16:51:06 +01:00
David Given ca5b6e07bb Properly export symbols. 2016-10-29 23:52:17 +02:00
David Given 8c3670483f Get top working with the PowerPC; use it to eliminate useless branches and
moves.
2016-10-29 23:37:11 +02:00
David Given a8c4dac67c Merge from default (merging in George Koehler's PowerPC changes). 2016-10-29 22:40:40 +02:00
David Given a311e61360 Add support for preserved registers. 2016-10-29 20:22:44 +02:00
David Given e3ebf986e9 More opcodes. 2016-10-29 13:32:09 +02:00
David Given acaae765af Emit negative constants correctly. 2016-10-29 12:55:21 +02:00
David Given 61349389fb More opcodes. sti can now cope with non-standard sizes (really need a better
fix for this). Hack in crude support for mismatched stack pushes and pops (ints
vs longs).
2016-10-29 12:48:05 +02:00
David Given 2cc2c0ae98 Lots more opcodes. Rearrange the stack layout so that fp->ab is a fixed value
(needed for CHAINFP and FPTOAB). Wire up lfrs to calls via a phi when
necessary, to allow call-bra-lfr chains.
2016-10-29 11:57:56 +02:00
David Given bfa65168e2 Don't generate phis if unnecessary (because this breaks the
critical-edge-splitting guarantee and causes insertion of phi copies to fail).
2016-10-29 10:55:48 +02:00
David Given 658db4ba71 Mangle label names (turns out that the ACK assembler can't really cope with
labels that are the same name as instructions...).
2016-10-27 23:17:16 +02:00
David Given 81525c0f2c Swaps work (at least for registers). More opcodes. Rearrange the stack layout
so we can always trivially find fp, which lets CHAINFP work.
2016-10-27 21:50:58 +02:00
David Given be3dece5af Allow emission of strings containing ". 2016-10-27 21:48:46 +02:00
David Given 51bd3ee4dd Fix bug where some phis weren't being inserted when a given variable definition
needed more than one phi (due to the dominance frontier containing more than
one basic block).
2016-10-27 21:40:25 +02:00
David Given 9977ce841a Remove the bytes1, bytes2, bytes4, bytes8 attributes; remove the concept of a
register 'type'; now use int/float/long/double throughout to identify
registers. Lots of register allocator tweaks and table bugfixes --- we now get
through the dreading Mathlib.mod!
2016-10-25 23:04:20 +02:00
David Given 45a7f2e993 Phi copies are now inserted as part of type inference. More opcodes. 2016-10-24 22:14:08 +02:00
David Given 111c13e253 More opcodes. 2016-10-24 20:15:22 +02:00
David Given a4644dee4d More opcodes. 2016-10-24 12:08:40 +02:00
David Given b22780c075 More opcodes, including the difficult and fairly stupid los/sts. 2016-10-23 22:24:08 +02:00
David Given abd0cedd61 Massive change to how IR types are handled; we use the type code for matching
rather than the size. Much cleaner and simpler.
2016-10-23 21:54:14 +02:00
David Given b1a3d76d6f Re-re-add the type inference layer, now I know more about how things work.
Remove that terrible float promotion code.
2016-10-22 23:04:13 +02:00
David Given 11b0bc1055 More opcodes. 2016-10-22 20:32:51 +02:00
David Given 2d52b1fdaa Remove GETRET; values are now returned directly by CALL. Fix a bug in
convertstackops which was resulting in duplicate IR groups.
2016-10-22 12:13:57 +02:00
David Given ceb938fb3c More opcodes. 2016-10-22 11:26:28 +02:00
David Given 7ae888b754 Hacky workaround the way the Modula-2 compiler generates non-standard sized
loads and saves. More opcodes; simplified table using macros.
2016-10-22 10:48:22 +02:00
David Given 90d0661639 Typo fix. 2016-10-22 00:48:55 +02:00
David Given f851ab83af Better (and more correct) floating point conversions; fif; various new opcodes. 2016-10-22 00:48:26 +02:00
David Given d535be87b1 fef4 and fef8 is now cleaner, albeit slower; add some more register alias
stuff.
2016-10-22 00:02:15 +02:00
David Given 4db402f229 Add (pretty crummy) support for register aliases and static pairs of registers.
We should have enough functionality now for rather buggy 8-bit ints and
doubles. Rework the table and the platform.c to match.
2016-10-21 23:31:00 +02:00
David Given e4fec71f9c Lots more opcodes; better eviction behaviour; better register moves. Lots more
PowerPC stuff (some working).
2016-10-19 23:29:05 +02:00
David Given ffb1eabf45 Floating point promotion is less buggy. 2016-10-19 23:27:53 +02:00
David Given d5071e7df1 Promote values accessed via NOP. 2016-10-18 23:58:03 +02:00
David Given 5413d47029 '!' tracing is now always emitted; tracing goes to stderr. 2016-10-18 22:32:09 +02:00
David Given 3520704ea8 Add support for floating point constants. 2016-10-18 22:29:42 +02:00
David Given 938fb8c2fc Lots more opcodes. 2016-10-18 00:31:26 +02:00
David Given 4a093b9eba Add li and mr pseudoinstructions. 2016-10-18 00:21:32 +02:00
David Given 5f0164db62 Bolt mcg into the PowerPC backend. It doesn't build yet, but it is generating
*some* code.
2016-10-17 00:06:06 +02:00
David Given 1e17921208 Implement saving of dirty registers onto the stack. 2016-10-16 22:37:42 +02:00
David Given 6a23906ad8 Various bits of cleanup; we should almost be ready to try sending this to the
assembler soon...
2016-10-15 23:39:38 +02:00
David Given 286435a2ed Oops, forgot to add the output option spec to the string! 2016-10-15 23:34:54 +02:00
David Given b36897c299 References to the stack frame are now rendered properly. 2016-10-15 23:33:30 +02:00
David Given a8ee82d197 Stop passing proc around, and use a global instead --- much cleaner. 2016-10-15 23:19:44 +02:00
David Given 7aa60a6451 Register spilling to the stack frame works, more or less. 2016-10-15 22:53:56 +02:00
David Given 0eb32e7553 Fix yet another bug to do with IR register outputs. 2016-10-15 19:14:25 +02:00
David Given 9504aec2bd Function termination gets routed through an exit block; we now have prologues
and epilogues. mcgg now exports some useful data as headers. Start factoring
out some of the architecture-specific bits into an architecture-specific file.
2016-10-15 18:38:46 +02:00
David Given 5ad3aa8595 Add a pile of new instructions used by Pascal; I'm going to need to think about
how locals and the local base are handled.
2016-10-15 13:07:59 +02:00
David Given 358c44de35 Bytes were sometimes failing to be sign extended correctly. 2016-10-15 12:11:40 +02:00
David Given 517120d0fb Allow asm names for registers which are different from the friendly names shown
in the tracing (because PowerPC register names are just numbers).
2016-10-15 11:42:47 +02:00
David Given b2ddf12473 Some more opcodes. 2016-10-15 11:22:40 +02:00
David Given bb17aea73a You can now mark a register as corrupting a certain register class; calls work,
or at least look like they work. The bad news is that the register allocator
has a rare talent for putting things in the wrong register.
2016-10-15 01:15:08 +02:00
David Given 886adb86d7 Log empty hops. 2016-10-14 23:19:25 +02:00
David Given 4f2177e41f Reworked loads and stores; it's now *different*, maybe not better. 2016-10-14 23:19:02 +02:00
David Given a63052427e Factor out the register allocation routines to make them easier to deal with. 2016-10-14 23:17:06 +02:00
David Given bb53a7fb51 Fix stupid issue where hop output registers were being overwritten, leading to
invalid SSA form.
2016-10-14 23:12:29 +02:00
David Given 98fe70a7de Output register equality constraints work. 2016-10-14 22:17:02 +02:00
David Given 216ff5cc43 Make loads and stores in the table nicer; fix a place where it looked like it
was working but only accidentally.
2016-10-12 23:12:53 +02:00
David Given f06b51c981 Keep track of register types as well as attributes --- the type being how we
find new registers when evicting values. Input constraints work (they were
being ignored before). Various bug fixing so they actually work.
2016-10-12 22:58:46 +02:00
David Given 4723a1442f Add code to remove unused phis, converting to pruned SSA form, to avoid
confusing the register allocator later.
2016-10-12 21:50:12 +02:00
David Given df239b3f90 Don't allow the same IR to be added to the sequence list more than once
(sometimes happens because op_dup, but makes no sense).
2016-10-12 00:45:36 +02:00
David Given 96dffd2007 Clean up the allocator a bit, in preparation for making it lots more
complicated; no semantic changes.
2016-10-11 23:17:30 +02:00
David Given 668cccdff1 A few more opcodes. 2016-10-11 00:29:18 +02:00
David Given 2be1c51885 A little fiddling with store instructions. The PowerPC is not friendly to
iburg.
2016-10-11 00:23:35 +02:00
David Given e93c58dc8d Refactored the way hops are rendered; add support for emitting code (although
with no prologue or epilogue yet).
2016-10-11 00:12:11 +02:00
David Given 92bd1ac5f4 Register allocator now gets all the way through all of my test file without
crashing (albeit with register moves and swaps stubbed out). Correct code? Who
knows.
2016-10-10 23:19:46 +02:00