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Author SHA1 Message Date
David Given
0da248dced Use a better NOT; and after remembering that PowerPC bit numbers are all 
backwards in the documentation, rewrote IFEQ/IFLT/IFLE to actually work.
Probably. Thanks to the B test suite for spotting this.
 2017-01-07 01:03:15 +01:00
David Given
d5328492d7 Better handling of float conversions; more tests; converting to unsigned ints 
works now.
 2016-11-20 11:27:40 +01:00
David Given
454a7494bb cif8 and cuf8 work now. More tests. 2016-11-19 11:42:30 +01:00
David Given
d31bc6a3f9 Made csa and csb work with mcg; adjust the libem functions and the 
corresponding invocation in the ncg table so the same helpers can be used for
both mcg and ncg. Add a new IR opcode, FARJUMP, which jumps to a helper
function but saves volatile registers.
 2016-11-19 10:55:41 +01:00
David Given
5208e5f751 Yet another OB1 stack format fix. 2016-11-19 10:42:22 +01:00
David Given
86c832ef86 Put saved registers in *actually* the write place. I hope. 2016-11-15 21:54:15 +01:00
David Given
cc686ded62 Get subtractions the right way round. 2016-11-15 20:25:11 +01:00
David Given
852d3a691d Update the table to return call output values in the right registers. Fix the 
register allocator so the corrupted registers only apply to throughs
(otherwise, you can't put output registers in corrupted registers).
 2016-11-11 21:48:36 +01:00
David Given
b5c1d622f5 Rework the way stack frames are laid out to be simpler and, hopefully, more 
correct. Saved registers are now placed in what may be the right place.
 2016-11-11 21:17:45 +01:00
David Given
9261cd978d Typo fix. 2016-10-31 23:16:02 +01:00
David Given
941072e0d7 Add, I hope, patterns for fmsub, fnmadd, and fnmsub (also float versions). 2016-10-31 22:36:54 +01:00
David Given
44f0cea6ca Also use fmadd for single-precision floats. 2016-10-31 19:55:16 +01:00
David Given
064d1a5d5d Use fmadd for multiply-and-add instructions. 2016-10-31 19:52:17 +01:00
David Given
a8c4dac67c Merge from default (merging in George Koehler's PowerPC changes). 2016-10-29 22:40:40 +02:00
David Given
a311e61360 Add support for preserved registers. 2016-10-29 20:22:44 +02:00
David Given
1ae8b90238 More opcodes. 2016-10-29 12:55:34 +02:00
David Given
61349389fb More opcodes. sti can now cope with non-standard sizes (really need a better 
fix for this). Hack in crude support for mismatched stack pushes and pops (ints
vs longs).
 2016-10-29 12:48:05 +02:00
David Given
68419da235 Actually, the locals need to go above the spills and saved regs, so fp == lb. 2016-10-29 12:00:33 +02:00
David Given
2cc2c0ae98 Lots more opcodes. Rearrange the stack layout so that fp->ab is a fixed value 
(needed for CHAINFP and FPTOAB). Wire up lfrs to calls via a phi when
necessary, to allow call-bra-lfr chains.
 2016-10-29 11:57:56 +02:00
David Given
658db4ba71 Mangle label names (turns out that the ACK assembler can't really cope with 
labels that are the same name as instructions...).
 2016-10-27 23:17:16 +02:00
David Given
81525c0f2c Swaps work (at least for registers). More opcodes. Rearrange the stack layout 
so we can always trivially find fp, which lets CHAINFP work.
 2016-10-27 21:50:58 +02:00
David Given
9977ce841a Remove the bytes1, bytes2, bytes4, bytes8 attributes; remove the concept of a 
register 'type'; now use int/float/long/double throughout to identify
registers. Lots of register allocator tweaks and table bugfixes --- we now get
through the dreading Mathlib.mod!
 2016-10-25 23:04:20 +02:00
David Given
45a7f2e993 Phi copies are now inserted as part of type inference. More opcodes. 2016-10-24 22:14:08 +02:00
David Given
111c13e253 More opcodes. 2016-10-24 20:15:22 +02:00
David Given
b22780c075 More opcodes, including the difficult and fairly stupid los/sts. 2016-10-23 22:24:08 +02:00
David Given
abd0cedd61 Massive change to how IR types are handled; we use the type code for matching 
rather than the size. Much cleaner and simpler.
 2016-10-23 21:54:14 +02:00
David Given
11b0bc1055 More opcodes. 2016-10-22 20:32:51 +02:00
David Given
2d52b1fdaa Remove GETRET; values are now returned directly by CALL. Fix a bug in 
convertstackops which was resulting in duplicate IR groups.
 2016-10-22 12:13:57 +02:00
David Given
ceb938fb3c More opcodes. 2016-10-22 11:26:28 +02:00
David Given
7ae888b754 Hacky workaround the way the Modula-2 compiler generates non-standard sized 
loads and saves. More opcodes; simplified table using macros.
 2016-10-22 10:48:22 +02:00
David Given
f851ab83af Better (and more correct) floating point conversions; fif; various new opcodes. 2016-10-22 00:48:26 +02:00
David Given
d535be87b1 fef4 and fef8 is now cleaner, albeit slower; add some more register alias 
stuff.
 2016-10-22 00:02:15 +02:00
David Given
4db402f229 Add (pretty crummy) support for register aliases and static pairs of registers. 
We should have enough functionality now for rather buggy 8-bit ints and
doubles. Rework the table and the platform.c to match.
 2016-10-21 23:31:00 +02:00
David Given
e4fec71f9c Lots more opcodes; better eviction behaviour; better register moves. Lots more 
PowerPC stuff (some working).
 2016-10-19 23:29:05 +02:00
David Given
938fb8c2fc Lots more opcodes. 2016-10-18 00:31:26 +02:00
David Given
5f0164db62 Bolt mcg into the PowerPC backend. It doesn't build yet, but it is generating 
*some* code.
 2016-10-17 00:06:06 +02:00