PowerPC has a few hundred special-purpose registers. The assembler
had only accepted the names "xer", "lr", "ctr". Most programs use
only those three SPRs. If I add more names, they would almost never
get used, and they might conflict with labels.
I want to use "mfspr r3, 0x3f0" and "mtspr 0x3f0, r3" in
plat/qemu/boot.s to access register hid0 from supervisor mode.
corresponding invocation in the ncg table so the same helpers can be used for
both mcg and ncg. Add a new IR opcode, FARJUMP, which jumps to a helper
function but saves volatile registers.
register 'type'; now use int/float/long/double throughout to identify
registers. Lots of register allocator tweaks and table bugfixes --- we now get
through the dreading Mathlib.mod!
This would have happened later, if f14 to f31 became regvar (like r13
to r31 are now). I am doing it now because ncg is too slow for rules
"with FREG FREG uses FREG". We use such rules for adf 8 and other EM
instructions that operate on 2 floats. Like my last commit cfbc537,
this commit speeds ncg by removing choices for register allocation.
ncg is too slow with this many registers. A stack pattern "with GPR
GPR GPR" or "with REG REG REG" takes too long to pick registers,
causing ncg 8 to take about 2 seconds on each sti 8. I introduce
REG_PAIR and there are only 4 such pairs.
For programs that use sti 8 (including C programs that copy 8-byte
structs), this speed hack improves the ncg run from several seconds to
almost instantaneous.
Also add a few COMMENT(...) lines in stacking rules.
This fixes the SIGILL (illegal instruction) in startrek when firing
phasers. The 32-bit processors in my PowerPC Mac and in QEMU don't
have fctid, a 64-bit instruction.
I got the idea from mach/proto/fp/fif8.c to extract the exponent,
clear some bits to get an integer, then subtract the integer from
the original value to get the fraction.
Adjust some of the loi rules (and associated moves) so we can identify
the tokens that must be in MEMORY.
With this commit, I can navigate the Enterprise even if I comment out
my work-around from e22c888.
Because li32 always loads a label into a GPR, it is sufficient to
coerce LABEL to REG, then use IND_RC_W or IND_RC_D for indirection
through the label.
Now that SUM_RC always has a signed 16-bit constant, it happens that
the various IND_RC_* tokens also have a signed 16-bit constant, so
we no longer need to touch the scratch register.
