David Given
e77c5164cf
Fleshed out hops and vregs. The result is almost looking like code now ---
...
uncanny.
2016-09-27 00:19:45 +02:00
David Given
cc176e5183
Keep more data around about ir instructions. Implement a half-baked type
...
inference routine to propagate information about floats up the tree, so we know
whether to put floats into special registers as early as possible.
2016-09-26 22:12:46 +02:00
David Given
416b13fd76
Start factoring out the hardware op code.
2016-09-25 23:29:59 +02:00
David Given
39aa672422
Sort of keep track of registers and register classes. Start walking the
...
generated instruction tree --- holy cow, they look like instructions!
2016-09-25 22:17:14 +02:00
David Given
629e0ddfc6
Some instruction selection is now happening.
2016-09-24 22:46:08 +02:00
David Given
ed67d427c9
Replaced the block splicer with a trivial block eliminator (which rewrites
...
jumps to blocks which contain only a jump). Don't bother storing the bb graph
in the ir nodes; we can find it on demand by walking the tree instead ---
slower, but much easier to understand and more robust. Added a terrible map
library.
2016-09-23 23:59:15 +02:00
David Given
9077baa850
Add a bodged in algorithm for converting basic block communication from stacked
...
variables to SSA. Also add dead block removal and block splicing. IR code is
much better now.
2016-09-22 23:19:29 +02:00
David Given
6a74cb2e11
Tracing cleanup. Simplified the IR code. Some more opcodes.
2016-09-22 00:15:48 +02:00
David Given
6ce2495aeb
Store the EM code up front and build the basic block graph *before*
...
generating the IR code. Lots more IR code.
2016-09-19 23:06:59 +02:00
David Given
176cd7365c
Archival checking of the half-written IR treebuilder.
2016-09-18 23:24:54 +02:00
