David Given
e4fec71f9c
Lots more opcodes; better eviction behaviour; better register moves. Lots more
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PowerPC stuff (some working).
2016-10-19 23:29:05 +02:00
David Given
ffb1eabf45
Floating point promotion is less buggy.
2016-10-19 23:27:53 +02:00
David Given
d5071e7df1
Promote values accessed via NOP.
2016-10-18 23:58:03 +02:00
David Given
5413d47029
'!' tracing is now always emitted; tracing goes to stderr.
2016-10-18 22:32:09 +02:00
David Given
3520704ea8
Add support for floating point constants.
2016-10-18 22:29:42 +02:00
David Given
938fb8c2fc
Lots more opcodes.
2016-10-18 00:31:26 +02:00
David Given
4a093b9eba
Add li and mr pseudoinstructions.
2016-10-18 00:21:32 +02:00
David Given
5f0164db62
Bolt mcg into the PowerPC backend. It doesn't build yet, but it is generating
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*some* code.
2016-10-17 00:06:06 +02:00
David Given
d539389e81
Merge in the unfinished PowerPC branch.
2016-10-16 22:38:27 +02:00
David Given
1e17921208
Implement saving of dirty registers onto the stack.
2016-10-16 22:37:42 +02:00
David Given
6a23906ad8
Various bits of cleanup; we should almost be ready to try sending this to the
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assembler soon...
2016-10-15 23:39:38 +02:00
David Given
286435a2ed
Oops, forgot to add the output option spec to the string!
2016-10-15 23:34:54 +02:00
David Given
b36897c299
References to the stack frame are now rendered properly.
2016-10-15 23:33:30 +02:00
David Given
a8ee82d197
Stop passing proc around, and use a global instead --- much cleaner.
2016-10-15 23:19:44 +02:00
David Given
7aa60a6451
Register spilling to the stack frame works, more or less.
2016-10-15 22:53:56 +02:00
David Given
0eb32e7553
Fix yet another bug to do with IR register outputs.
2016-10-15 19:14:25 +02:00
David Given
9504aec2bd
Function termination gets routed through an exit block; we now have prologues
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and epilogues. mcgg now exports some useful data as headers. Start factoring
out some of the architecture-specific bits into an architecture-specific file.
2016-10-15 18:38:46 +02:00
David Given
5ad3aa8595
Add a pile of new instructions used by Pascal; I'm going to need to think about
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how locals and the local base are handled.
2016-10-15 13:07:59 +02:00
David Given
358c44de35
Bytes were sometimes failing to be sign extended correctly.
2016-10-15 12:11:40 +02:00
David Given
517120d0fb
Allow asm names for registers which are different from the friendly names shown
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in the tracing (because PowerPC register names are just numbers).
2016-10-15 11:42:47 +02:00
David Given
b2ddf12473
Some more opcodes.
2016-10-15 11:22:40 +02:00
David Given
bb17aea73a
You can now mark a register as corrupting a certain register class; calls work,
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or at least look like they work. The bad news is that the register allocator
has a rare talent for putting things in the wrong register.
2016-10-15 01:15:08 +02:00
David Given
886adb86d7
Log empty hops.
2016-10-14 23:19:25 +02:00
David Given
4f2177e41f
Reworked loads and stores; it's now *different*, maybe not better.
2016-10-14 23:19:02 +02:00
David Given
a63052427e
Factor out the register allocation routines to make them easier to deal with.
2016-10-14 23:17:06 +02:00
David Given
bb53a7fb51
Fix stupid issue where hop output registers were being overwritten, leading to
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invalid SSA form.
2016-10-14 23:12:29 +02:00
David Given
98fe70a7de
Output register equality constraints work.
2016-10-14 22:17:02 +02:00
David Given
216ff5cc43
Make loads and stores in the table nicer; fix a place where it looked like it
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was working but only accidentally.
2016-10-12 23:12:53 +02:00
David Given
f06b51c981
Keep track of register types as well as attributes --- the type being how we
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find new registers when evicting values. Input constraints work (they were
being ignored before). Various bug fixing so they actually work.
2016-10-12 22:58:46 +02:00
David Given
4723a1442f
Add code to remove unused phis, converting to pruned SSA form, to avoid
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confusing the register allocator later.
2016-10-12 21:50:12 +02:00
David Given
df239b3f90
Don't allow the same IR to be added to the sequence list more than once
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(sometimes happens because op_dup, but makes no sense).
2016-10-12 00:45:36 +02:00
David Given
96dffd2007
Clean up the allocator a bit, in preparation for making it lots more
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complicated; no semantic changes.
2016-10-11 23:17:30 +02:00
David Given
668cccdff1
A few more opcodes.
2016-10-11 00:29:18 +02:00
David Given
2be1c51885
A little fiddling with store instructions. The PowerPC is not friendly to
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iburg.
2016-10-11 00:23:35 +02:00
David Given
e93c58dc8d
Refactored the way hops are rendered; add support for emitting code (although
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with no prologue or epilogue yet).
2016-10-11 00:12:11 +02:00
David Given
92bd1ac5f4
Register allocator now gets all the way through all of my test file without
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crashing (albeit with register moves and swaps stubbed out). Correct code? Who
knows.
2016-10-10 23:19:46 +02:00
David Given
a4d06d1795
D'oh, need multiple passes over the edge splitter in order to properly find all
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cases.
2016-10-10 23:18:37 +02:00
David Given
fac12aae32
Calculate phi congruency groups; use them to solve the
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importing-hreg-from-the-future problem (probably poorly).
2016-10-09 22:04:20 +02:00
David Given
23c3575f0f
The register allocator now makes a spirited attempt to honour register
...
attributes when allocating. Unfortunately, backward edges don't work (because
the limited def-use chain stuff doesn't work across basic blocks). Needs more
thought.
2016-10-09 15:09:34 +02:00
David Given
38de688c5a
Floating point promotion was broken since the IR float change. Fix.
2016-10-09 15:08:03 +02:00
David Given
36cddd6afb
Add some more opcodes; rearrange the registers to be more PowerPC-friendly.
2016-10-09 14:45:13 +02:00
David Given
cfe5312fcc
Predicates can now take numeric arguments. The PowerPC predicates have been
...
turned into generic ones (as they'll be useful everywhere). Node arguments for
predicates require the '%' prefix for consistency. Hex numbers are permitted.
2016-10-09 12:32:36 +02:00
David Given
d75cc0a663
Basic register allocation works!
2016-10-08 23:32:54 +02:00
David Given
637aeed70a
Only allocate an output vreg if the instruction actually wants one.
2016-10-08 12:15:21 +02:00
David Given
2198db69b1
Instruction predicates work now.
2016-10-08 11:35:33 +02:00
David Given
9ebf731335
Minor cleanup.
2016-10-08 11:07:28 +02:00
David Given
9db902314b
Fix bug where pushes were being placed in the wrong blocks.
2016-10-08 10:21:24 +02:00
David Given
4e49830e09
Overhaul of everything phi related; critical edge splitting now happens before
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anything SSA happens; liveness calculations now look like they might be
working.
2016-10-08 00:21:23 +02:00
David Given
ee93389c5f
Refactor the cfg and dominance stuff to make it a lot nicer.
2016-10-06 21:34:21 +02:00
David Given
d20b63dc94
The register allocator is really a pass, so arrange the code like one.
2016-10-05 23:55:38 +02:00
