turned into generic ones (as they'll be useful everywhere). Node arguments for
predicates require the '%' prefix for consistency. Hex numbers are permitted.
This feature has never been used since its introduction, more than 3
years ago, in David Given's commit c93cb69 of May 8, 2013. The commit
was for "PowerPC and M68K work". I am not undoing the entire commit.
I am only removing the stackadjust and stackoffset() feature.
This commit removes the feature from my branch kernigh-linuxppc. This
removal includes the mach/proto/ncg parts. The default branch already
removed most of the feature, but kept the mach/proto/ncg parts. That
removal happened in commit 81778b6 of May 13, 2013 (which was a merge;
git diff af0dede81778b6). The branch dtrg-experimental-powerpc
merged the default branch but without the removal. That merge was
commit 4703db0f of Sep 15, 2016 (git diff 8c94b134703db0). My branch
kernigh-linuxppc is off branch dtrg-experimental-powerpc, so I can no
longer get the removal by merging default.
David Given described the stackadjust feature in
https://sourceforge.net/p/tack/mailman/message/30814691/
The instruction stackadjust would add a value to the offset, and the
function stackoffset() would return this offset. One would use this
to track sp - fp, then omit the frame pointer by not keeping fp in a
register.
We only need GPRE in a few places where we write {GPRE, regvar(...)}
because ncgg can't parse plain regvar(...). In all other places, a
plain GPR works.
Also remove gpr_gpr_gpr and a few other unused and fake instructions
from the list of instructions.
Rename the scratch gpr (currently r11) from SCRATCH to RSCRATCH so I
can search for RSCRATCH without finding FSCRATCH. I also want to
avoid confusion with the SCRATCH keyword of the old code generator (cg
which came before ncg).
Change the stacking rules to prevent stacking of RSCRATCH or FSCRATCH
or any other GPR or FPR that isn't an allocatable REG or FREG. Then
ncgg rejects any rule that tries to stack a GPR or FPR, so change such
rules to stack a REG or FREG.
order. Since the dominance tree has changed when I fiddled with the graph, I
need to recompute it, so factor it out of the SSA pass. Code is uglier than I'd
like but at least the RET statement goes last in the generated code now.
mcg can track individual hop inputs and outputs (needed for live range
analysis!); the register allocator now puts the basic blocks into the right
order in preparation for live range analysis.
to make special nodes like NOP work properly). Realise that the way I'm dealing
with the instruction selector is all wrong; I need to physically copy chunks of
tree to give to burg (so I can terminate them correctly).
These produce Mach-o executables for Mac OS X on Intel or PowerPC
processors. Our code generator for PowerPC (mach/powerpc) still has
bugs. Some examples seem to run, but startrek crashes. Our code
generator for Intel (mach/i386) is better.
There is a problem with job control. If you run paranoia or startrek,
then suspend the job (^Z) and resume it ('fg' in bash), then read(2)
might fail with EINTR.
The larger files in this commit are
- plat/osx/cvmach/cvmach.c
- plat/osx/libsys/brk.c
- plat/osx386/libsys/sigaction.s
- plat/osxppc/libsys/sigaction.s
inasmuch as it looks better before register allocation. Basic blocks now know
their own successors and predecessors (after a certain point in the IR
processing).
functions. Not convinced that semantic types are actually working --- there are
still problems with earlier statements leaving things in the wrong registers.
