Commit graph

4 commits

Author SHA1 Message Date
George Koehler 54949f713f Change .fef8 and .fif8 to pass values on the stack.
Reorder the code in .fef8 and .fif8 so that in the usual case, we fall
through to the blr without taking any branches.  The usual case, by my
guess, is .fef8 with normalized numbers or .fif8 with small integers.

I change .fef8 and .fif8 to pass values on the real stack, not in
specific registers.  This simplifies the ncg table, and might help me
experiment with changes to the ncg table.

This change might or might not help mcg.  Seems that mcg always uses
the stack to pass values to libem, but I have not tested .fef8 or
.fif8 with mcg.
2017-02-12 16:44:37 -05:00
George Koehler 032bcffef6 In PowerPC libem, use the new features of our assembler.
The new features are the hi16/lo16 and ha16/lo16 syntax for
relocations, and the extended mnemonics like "blr".

Use ha16/lo16 to load some double floats with 2 instructions (lis/lfd)
instead of 3 (lis/ori/lfd).

Use the extended names for branches, comparisons, and bit rotations,
so I can more easily read the code.  The new names often encode the
same machine instructions as the old names, except in a few places
where I changed the instructions.

Stop using andi. when we don't need to set cr0.  In inn.s, I change
andi. to extrwi to extract the same bits.  In los.s and sts.s, I
change "andi. r3, r3, ~3" to "clrrwi r3, r3, 2".  This avoids setting
cr0 and also stops clearing the high 16 bits of r3.

In csa.s, los.s, sts.s, I change some comparisons and right shifts
from signed to unsigned (cmplw, cmplwi, srwi), because the sizes are
unsigned.  In inn.s, the right shift can be signed (sraw) or unsigned
(srw), but I use srw because we don't need the carry bit.

In fef8.s, I save an instruction by using rlwinm instead of addis/andc
to rlwinm to clear a field.  The code no longer kills r7.  In both
fef8.s and fif8.s, I remove the list of killed registers.

Also remove some whitespace from ends of lines.
2017-01-23 17:16:39 -05:00
George Koehler f33b30ed3c Rewrite .fif8 to avoid powerpc64 fctid
This fixes the SIGILL (illegal instruction) in startrek when firing
phasers.  The 32-bit processors in my PowerPC Mac and in QEMU don't
have fctid, a 64-bit instruction.

I got the idea from mach/proto/fp/fif8.c to extract the exponent,
clear some bits to get an integer, then subtract the integer from
the original value to get the fraction.
2016-10-17 00:39:59 -04:00
dtrg 4dd1ff6d80 Archival checkin (semi-working code). 2007-11-02 18:56:58 +00:00