.\" $Header$
.TH M68K2_AS 6 "$Revision$"
.ad
.SH NAME
m68k2_as \- assembler for Motorola 68000
.SH SYNOPSIS
~em/lib.bin/m68k2/as [options] argument ...
.SH DESCRIPTION
This assembler is made with the general framework
described in \fIuni_ass\fP(6). It is an assembler generating relocatable
object code in \fIack.out\fP(5) format.
.SH SYNTAX
.IP registers
The 68000 has the following registers:
seven data-registers (d1 - d7), seven address-registers (a1 - a6, sp)
of which sp is the system stack pointer, a program counter (pc),
a status register (sr), and a condition codes register (ccr) which is actually
just the low order byte of the status register.
.IP "addressing modes"
.nf
.ta 8n 16n 24n 32n 40n 48n
syntax		meaning (name)

reg		contents of \fIreg\fP is operand, where \fIreg\fP is
		one of the registers mentioned above (register direct)

(areg)		contents of \fIareg\fP is address of operand, where
		\fIareg\fP is an address-register
		(address register indirect)

(areg)+		same as (areg), but after the address is used,
		\fIareg\fP is incremented by the operand length
		(postincrement)

-(areg)		same as (areg), but before the address is used,
		\fIareg\fP is decremented by the operand length
		(predecrement)

expr(areg)
expr(pc)	\fIexpr\fP + the contents of the register yields the
		address of the operand (displacement)

expr(areg, ireg)
expr(pc, ireg)	\fIexpr\fP + the contents of the register + the contents
		of \fIireg\fP yields the address of the operand. \fIireg\fP is
		an address- or a data-register.
		\fIireg\fP may be followed by .w or .l indicating whether
		the size of the index is a word or a long
		(displacement with index)

expr		\fIexpr\fP is the address of the operand
		(absolute address)

#expr		\fIexpr\fP is the operand (immediate)
.fi

Some instructions have as operand a register list. This list consists of 
one or more ranges of registers separated by '/'s. A register range consists
of either one register (e.g. d3) or two registers separated by a '-'
(e.g. a2-a4, or d4-d5). The two registers must be in the same set (address-
or data-registers) and the first must have a lower number than the second.
.IP instructions
Some instructions can have a byte, word, or longword operand.
This may be indicated by prepending the mnemonic with .b, .w, or .l
respectively. Default is .w.
.SH "SEE ALSO"
uni_ass(6),
ack(1),
ack.out(5),
.br
MC68000 16-bit microprocessor User's manual, Motorola Inc, 1979 
.SH EXAMPLE
.sp 2
.nf
.ta 8n 16n 24n 32n 40n 48n 56n 64n
	.define	.cii
	
		.sect .text
	.cii:
		movem.l	a0/d0/d1,.savreg
		move.l	(sp)+,a0	! return address
		move	(sp)+,d0	! destination size
		sub	(sp)+,d0	! destination - source size
		bgt	1f
		sub	d0,sp		! pop extra bytes
		bra	3f
	1:
		move	(sp),d1
		ext.l	d1
		swap	d1
		asr	#1,d0
	2:
		move.w	d1,-(sp)
		sub	#1,d0
		bgt	2b
	3:
		move.l	a0,-(sp)
		movem.l	.savreg,a0/d0/d1
		rts
.fi