032bcffef6
The new features are the hi16/lo16 and ha16/lo16 syntax for relocations, and the extended mnemonics like "blr". Use ha16/lo16 to load some double floats with 2 instructions (lis/lfd) instead of 3 (lis/ori/lfd). Use the extended names for branches, comparisons, and bit rotations, so I can more easily read the code. The new names often encode the same machine instructions as the old names, except in a few places where I changed the instructions. Stop using andi. when we don't need to set cr0. In inn.s, I change andi. to extrwi to extract the same bits. In los.s and sts.s, I change "andi. r3, r3, ~3" to "clrrwi r3, r3, 2". This avoids setting cr0 and also stops clearing the high 16 bits of r3. In csa.s, los.s, sts.s, I change some comparisons and right shifts from signed to unsigned (cmplw, cmplwi, srwi), because the sizes are unsigned. In inn.s, the right shift can be signed (sraw) or unsigned (srw), but I use srw because we don't need the carry bit. In fef8.s, I save an instruction by using rlwinm instead of addis/andc to rlwinm to clear a field. The code no longer kills r7. In both fef8.s and fif8.s, I remove the list of killed registers. Also remove some whitespace from ends of lines.
48 lines
670 B
ArmAsm
48 lines
670 B
ArmAsm
.sect .text
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! Loads a variable-sized structure onto the stack.
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!
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! r3 = size
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! r4 = address
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.define .los
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.los:
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! These sizes are handled specially.
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cmplwi r3, 1
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ble size1
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cmplwi r3, 2
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ble size2
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cmplwi r3, 4
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ble size4
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! Variable-sized structure.
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addi r3, r3, 3
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clrrwi r3, r3, 2 ! align size
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add r4, r4, r3 ! adjust address to top of block
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srwi r3, r3, 2 ! convert size to the number of words
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mtspr ctr, r3
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1:
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lwzu r5, -4(r4)
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stwu r5, -4(sp)
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bdnz 1b ! decrement CTR, jump if non-zero
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blr
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size1:
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lbz r3, 0(r4)
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b 1f
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size2:
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lhz r3, 0(r4)
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b 1f
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size4:
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lwz r3, 0(r4)
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1:
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stwu r3, -4(sp)
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blr
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