9504aec2bd
and epilogues. mcgg now exports some useful data as headers. Start factoring out some of the architecture-specific bits into an architecture-specific file.
474 lines
11 KiB
Plaintext
474 lines
11 KiB
Plaintext
REGISTERS
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/* Registers are allocated top down; the order here is odd in order to make
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* sure that non-volatile registers get allocated from r31 (or f31) down.
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*
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* Attributes ending in an exclamation mark must match exactly when copying
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* a register into another register (e.g. for eviction).
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*/
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r12 "r12" bytes4! int! volatile;
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r11 "r11" bytes4! int! volatile;
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r10 "r10" bytes4! int! volatile;
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r9 "r9" bytes4! int! volatile;
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r8 "r8" bytes4! int! volatile;
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r7 "r7" bytes4! int! volatile;
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r6 "r6" bytes4! int! volatile;
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r5 "r5" bytes4! int! volatile;
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r4 "r4" bytes4! int! volatile;
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r3 "r3" bytes4! int! ret volatile;
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r31 "r31" bytes4! int!;
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r30 "r30" bytes4! int!;
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r29 "r29" bytes4! int!;
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r28 "r28" bytes4! int!;
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r27 "r27" bytes4! int!;
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r26 "r26" bytes4! int!;
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r25 "r25" bytes4! int!;
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r24 "r24" bytes4! int!;
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r23 "r23" bytes4! int!;
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r22 "r22" bytes4! int!;
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r21 "r21" bytes4! int!;
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r20 "r20" bytes4! int!;
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r19 "r19" bytes4! int!;
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r18 "r18" bytes4! int!;
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r17 "r17" bytes4! int!;
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r16 "r16" bytes4! int!;
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r15 "r15" bytes4! int!;
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r14 "r14" bytes4! int!;
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f14 "f14" bytes4! float! volatile;
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f13 "f13" bytes4! float! volatile;
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f12 "f12" bytes4! float! volatile;
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f11 "f11" bytes4! float! volatile;
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f10 "f10" bytes4! float! volatile;
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f9 "f9" bytes4! float! volatile;
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f8 "f8" bytes4! float! volatile;
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f7 "f7" bytes4! float! volatile;
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f6 "f6" bytes4! float! volatile;
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f5 "f5" bytes4! float! volatile;
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f4 "f4" bytes4! float! volatile;
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f3 "f3" bytes4! float! volatile;
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f2 "f2" bytes4! float! volatile;
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f1 "f1" bytes4! float! volatile;
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f0 "f0" bytes4! float! volatile;
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f31 "f31" bytes4! float!;
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f30 "f30" bytes4! float!;
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f29 "f29" bytes4! float!;
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f28 "f28" bytes4! float!;
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f27 "f27" bytes4! float!;
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f26 "f26" bytes4! float!;
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f25 "f25" bytes4! float!;
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f24 "f24" bytes4! float!;
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f23 "f23" bytes4! float!;
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f22 "f22" bytes4! float!;
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f21 "f21" bytes4! float!;
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f20 "f20" bytes4! float!;
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f19 "f19" bytes4! float!;
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f18 "f18" bytes4! float!;
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f17 "f17" bytes4! float!;
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f16 "f16" bytes4! float!;
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f15 "f15" bytes4! float!;
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cr0 "cr0" cr!;
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DECLARATIONS
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cr;
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ubyteX; /* bottom 8 bits valid, the rest undefined */
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ubyte0; /* bottom 8 bits valid, the rest 0 */
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ushortX; /* bottom 16 bits valid, the rest undefined */
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ushort0; /* bottom 16 bits valid, the rest 0 */
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address fragment;
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PATTERNS
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/* Special */
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PAIR(BLOCK4, BLOCK4);
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/* Miscellaneous special things */
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PUSH4(in:(int)reg)
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emit "stwu %in, -4(sp)"
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cost 4;
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out:(int)reg = POP4
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emit "lwz %out, 0(sp)"
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emit "addi sp, sp, 4"
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cost 8;
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out:(float)reg = POPF4
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emit "lfs %out, 0(sp)"
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emit "addi sp, sp, 4"
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cost 8;
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SETRET4(in:(ret)reg)
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emit "! setret4"
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cost 4;
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(ret)reg = GETRET4
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emit "! getret4"
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cost 1;
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STACKADJUST4(delta:CONST4)
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when signed_constant(%delta, 16)
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emit "addi sp, sp, $delta"
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cost 4;
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out:(int)reg = GETFP4
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emit "mr %out, fp"
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cost 4;
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out:(int)reg = FPTOARGS4(GETFP4)
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emit "addi %out, fp, 8"
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cost 4;
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out:(int)reg = FPTOARGS4(in:(int)reg)
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emit "addi %out, %in, 8"
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cost 4;
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/* Memory operations */
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/* Stores */
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STORE4(addr:address, value:(int)reg)
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emit "stw %value, %addr"
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cost 4;
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STORE2(addr:address, value:(int)ushortX)
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emit "sth %value, %addr"
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cost 4;
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STORE2(ADD4(left:(int)reg, right:(int)reg), value:(int)ushortX)
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emit "sthx %value, %left, %right"
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cost 4;
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STORE1(addr:address, value:(int)ubyteX)
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emit "stb %value, %addr"
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cost 4;
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STORE1(ADD4(left:(int)reg, right:(int)reg), value:(int)ubyteX)
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emit "stbx %value, %left, %right"
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cost 4;
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/* Loads */
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out:(int)reg = LOAD4(addr:address)
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emit "lwz %out, %addr"
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cost 4;
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out:(int)ushort0 = LOAD2(addr:address)
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emit "lhz %out, %addr"
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cost 4;
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out:(int)ubyte0 = LOAD1(addr:address)
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emit "lbz %out, %addr"
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cost 4;
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/* ubyte intrinsics */
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out:(int)ubyteX = in:(int)ubyte0
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with %out == %in
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emit "! ubyte0 -> ubyteX"
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cost 1;
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out:(int)ubyte0 = in:(int)ubyteX
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emit "andi %out, %in, 0xff ! ubyteX -> ubyte0"
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cost 4;
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out:(int)reg = in:(int)ubyte0
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with %out == %in
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emit "! ubyte0 -> reg"
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cost 4;
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out:(int)ubyteX = in:(int)reg
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with %out == %in
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emit "! reg -> ubyteX"
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cost 1;
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/* ushort intrinsics */
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out:(int)ushortX = in:(int)ushort0
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with %out == %in
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emit "! ushort0 -> ushortX"
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cost 1;
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out:(int)ushort0 = in:(int)ushortX
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emit "andi %out, %in, 0xff ! ushortX -> ushort0"
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cost 4;
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out:(int)reg = in:(int)ushort0
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with %out == %in
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emit "! ushort0 -> reg"
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cost 4;
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out:(int)ushortX = in:(int)reg
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with %out == %in
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emit "! reg -> ushortX"
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cost 1;
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/* byte conversions */
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out:(int)ubyte0 = CIU14(in:(int)ubyte0)
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with %out == %in
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emit "! CIU14(ubyte0) -> ubyte0"
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cost 1;
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out:(int)ubyte0 = CIU41(in:(int)ubyte0)
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with %out == %in
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emit "! CIU41(ubyte0) -> ubyte0"
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cost 1;
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out:(int)ubyteX = CIU41(in:(int)ubyteX)
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with %out == %in
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emit "! CIU41(ubyteX) -> ubyteX"
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cost 1;
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out:(int)reg = CII14(in:(int)ubyteX)
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emit "extsb %out, %in ! CII14(ubyteX) -> reg"
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cost 4;
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/* short conversions */
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out:(int)ushort0 = CIU24(in:(int)ushort0)
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with %out == %in
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emit "! CIU24(ushort0) -> ushort0"
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cost 1;
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out:(int)ushort0 = CIU42(in:(int)ushort0)
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with %out == %in
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emit "! CIU42(ushort0) -> ushort0"
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cost 1;
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out:(int)ushortX = CIU42(in:(int)ushortX)
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with %out == %in
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emit "! CIU42(ushortX) -> ushortX"
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cost 1;
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out:(int)reg = CII24(in:(int)ushort0)
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with %out == %in
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emit "! CII24(ushort0) -> reg"
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cost 4;
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out:(int)reg = CII24(in:(int)ushortX)
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emit "extsh %out, %in"
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cost 4;
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/* Locals */
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out:(int)reg = in:LOCAL4
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emit "addi %out, fp, #$in"
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cost 4;
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address = in:LOCAL4
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emit "$in(fp)";
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/* Memory addressing modes */
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address = ADD4(addr:(int)reg, offset:CONST4)
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when signed_constant(%offset, 16)
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emit "$offset(%addr)";
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address = addr:(int)reg
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emit "0(%addr)";
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/* Branches */
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JUMP(addr:BLOCK4)
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emit "b $addr"
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cost 4;
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CJUMPEQ(value:(cr)cr, PAIR(true:BLOCK4, false:BLOCK4))
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emit "bc IFTRUE, EQ, $true"
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emit "b $false"
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cost 8;
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CJUMPLE(value:(cr)cr, PAIR(true:BLOCK4, false:BLOCK4))
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emit "bc IFTRUE, LE, $true"
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emit "b $false"
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cost 8;
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CJUMPLT(value:(cr)cr, PAIR(true:BLOCK4, false:BLOCK4))
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emit "bc IFTRUE, LT, $true"
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emit "b $false"
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cost 8;
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CALL(dest:LABEL4)
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with corrupted(volatile)
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emit "bl $dest"
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cost 4;
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CALL(dest:(int)reg)
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with corrupted(volatile)
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emit "mtspr ctr, %dest"
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emit "bcctrl ALWAYS, 0, 0"
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cost 8;
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JUMP(dest:LABEL4)
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emit "b $dest"
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cost 4;
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/* Comparisons */
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cr:(cr)cr = COMPARES4(left:(int)reg, right:(int)reg)
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emit "cmp %cr, 0, %left, %right"
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cost 4;
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cr:(cr)cr = COMPARES4(left:(int)reg, right:CONST4)
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when signed_constant(%right, 16)
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emit "cmpi %cr, 0, %left, $right"
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cost 4;
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cr:(cr)cr = COMPAREU4(left:(int)reg, right:(int)reg)
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emit "cmpl %cr, 0, %left, %right"
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cost 4;
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cr:(cr)cr = COMPAREU4(left:(int)reg, right:CONST4)
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when signed_constant(%right, 16)
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emit "cmpli %cr, 0, %left, $right"
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cost 4;
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cr:(cr)cr = COMPARES4(COMPARES4(left:(int)reg, right:(int)reg), result:CONST4)
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when specific_constant(%result, 0)
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emit "cmp %cr, 0, %left, %right"
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cost 4;
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cr:(cr)cr = COMPARES4(COMPARES4(left:(int)reg, right:CONST4), result:CONST4)
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when specific_constant(%result, 0)
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when signed_constant(%right, 16)
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emit "cmpi %cr, 0, %left, $right"
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cost 4;
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cr:(cr)cr = COMPARES4(COMPAREU4(left:(int)reg, right:(int)reg), result:CONST4)
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when specific_constant(%result, 0)
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emit "cmpl %cr, 0, %left, %right"
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cost 4;
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/* Booleans */
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out:(int)reg = IFEQ4(in:(cr)cr)
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emit "mfcr %out" /* get cr0 */
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emit "rlwinmi %out, %out, 32-2, 2, 31" /* extract just EQ */
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cost 8;
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out:(int)reg = IFEQ4(in:(int)reg)
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emit "cntlzw %out, %in" /* returns 0..32 */
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emit "rlwinmi %out, %out, 32-5, 5, 31" /* if 32, return 1, otherwise 0 */
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cost 8;
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/* Conversions */
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out:(int)reg = CIU44(in:(int)reg)
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emit "mr %out, %in ! ciu44"
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cost 4;
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out:(int)reg = CUI44(in:(int)reg)
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emit "mr %out, %in ! cui44"
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cost 4;
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/* ALU operations */
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out:(int)reg = ADD4(left:(int)reg, right:(int)reg)
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emit "add %out, %left, %right"
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cost 4;
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out:(int)reg = ADD4(left:(int)reg, right:CONST4)
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when signed_constant(%right, 16)
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emit "addi %out, %left, $right"
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cost 4;
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out:(int)reg = ADD4(left:CONST4, right:(int)reg)
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when signed_constant(%left, 16)
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emit "addi %out, %right, $left"
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cost 4;
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out:(int)reg = SUB4(left:(int)reg, right:(int)reg)
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emit "subf %out, %left, %right"
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cost 4;
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out:(int)reg = SUB4(left:(int)reg, right:CONST4)
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emit "addi %out, %left, -($right)"
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cost 4;
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out:(int)reg = MUL4(left:(int)reg, right:(int)reg)
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emit "mullw %out, %right, %left"
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cost 4;
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out:(int)reg = MOD4(left:(int)reg, right:(int)reg)
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emit "divw %out, %left, %right"
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emit "mullw %out, %out, %right"
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emit "subf %out, %out, %left"
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cost 12;
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out:(int)reg = DIV4(left:(int)reg, right:(int)reg)
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emit "divw %out, %left, %right"
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cost 4;
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out:(int)reg = ASL4(left:(int)reg, right:(int)reg)
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emit "slw %out, %left, %right"
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cost 4;
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out:(int)reg = NEG4(left:(int)reg)
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emit "neg %out, %left"
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cost 4;
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out:(int)reg = OR4(left:(int)reg, right:(int)reg)
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emit "or %out, %right, %left"
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cost 4;
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out:(int)reg = EOR4(left:(int)reg, right:(int)reg)
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emit "xor %out, %right, %left"
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cost 4;
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out:(int)reg = value:LABEL4
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emit "la %out, $value"
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cost 4;
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out:(int)reg = value:BLOCK4
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emit "la %out, $value"
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cost 4;
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out:(int)reg = value:CONST4
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emit "li %out, $value"
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cost 8;
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/* FPU operations */
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out:(float)reg = value:CONSTF4
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emit "lfs %out, address-containing-$value"
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cost 8;
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out:(float)reg = ADDF4(left:(float)reg, right:(float)reg)
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emit "fadds %out, %left, %right"
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cost 4;
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out:(float)reg = SUBF4(left:(float)reg, right:(float)reg)
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emit "fsubs %out, %left, %right"
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cost 4;
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/* vim: set sw=4 ts=4 expandtab : */
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