573 lines
13 KiB
C
573 lines
13 KiB
C
/*
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* (c) copyright 1987 by the Vrije Universiteit, Amsterdam, The Netherlands.
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* See the copyright notice in the ACK home directory, in the file "Copyright".
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*/
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#define RCSID4 "$Header$"
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/*
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** Zilog z8000 yacc parsing rules
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*/
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operation
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: f1
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| f2
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| f3
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| f4
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| f5
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| f6
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| f7
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| f8
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| f9
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;
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f1 : F1_1F2_3 dst
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{ switch( ($1 & 0x0F00)>>8 ) {
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case 9: case 0xF: chtype( DST, TYPE_11a23 ); break;
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case 0xC: case 0xD: chtype( DST, TYPE_11b23 ); break;
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}
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emit2( mode | $1 | $2<<4 );
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if ( mode>>12 == 4 ) emit_ad( addr_inf );
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}
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| F1_1a reg
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{ chreg( $1, $2 );
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emit2( $1 | $2<<4 );
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}
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| F1_1b reg option
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{ if ( $3 != 1 && $3 != 2 ) argerr();
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emit2( $1 | $2<<4 | ($3-1)<<1 );
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}
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| F1_2 dst option
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{ chtype( DST, TYPE_12 );
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fit(fit4($3-1));
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emit2( mode | $1 | $2<<4 | $3-1 );
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if ( mode>>12 == 4 ) emit_ad( addr_inf );
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}
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| LDK reg ',' imexpr
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{ fit(fit4($4));
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emit2( $1 | $2<<4 | $4 );
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}
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| F1_2F6_3 dst ',' src
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{ if ( oprtype[ DST ] == REG && oprtype[ SRC ] == REG )
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{ emit2( $1 | $4 );
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emit2( $2<<8 );
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}
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else if ( oprtype[ SRC ] == IM )
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{ chtype( DST, TYPE_1263 );
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if ((immed.typ & ~S_EXT) != S_ABS) {
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serror("must be absolute");
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}
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if ( bitset($1,8) ) /* word */ fit(fit4(immed.val));
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else /* byte */ fit(fit3(immed.val));
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emit2( mode | $1 | $2<<4 | (int)immed.val );
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if ( mode>>12 == 4 ) emit_ad( addr_inf );
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}
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else argerr();
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}
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| JP coco1 dst
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{ chtype( DST, TYPE_jp );
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emit2( mode | $1 | $3<<4 | $2 );
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if ( mode>>12 == 4 ) emit_ad( addr_inf );
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}
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| TCC coco1 reg
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{ emit2( $1 | $3<<4 | $2 ); }
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;
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f2 : F2_1 reg ',' src
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{ switch( ($1 & 0xF000)>>12 )
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{ case 2: chtype( SRC, TYPE_21a ); break;
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case 3: chtype( SRC, TYPE_21b ); break;
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}
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emit2( mode | $1 | $4<<4 | $2 );
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if ( mode>>12 == 4 ) emit_ad( addr_inf );
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}
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| F2_1F5_1 dst ',' src
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{ switch( oprtype[ DST ] )
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{ case REG: chtype( SRC, TYPE_2151 );
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chreg( $1, $2 );
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emit2( mode | $1 | $4<<4 | $2 );
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break;
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case IR: case DA: case X:
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if ( oprtype[ SRC ] == IM
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&& ( $1 == 0x0B00 || $1 == 0x0A00 ) )
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/* cp or cpb */
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{ setmode( DST );
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emit2( mode | $1 + 0x201 | $2<<4 );
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break;
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}
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default: argerr();
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}
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if ( mode>>12 == 4 ) emit_ad( addr_inf );
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if ( oprtype[ SRC ] == IM )
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{ if (bitset($1,8)) /* word */ {
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#ifdef RELOCATION
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newrelo(immed.typ, RELO2|RELBR);
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#endif
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emit2( (int)immed.val );
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}
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else if (bitset($1,12)) /* long */ {
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#ifdef RELOCATION
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newrelo(immed.typ, RELO4|RELWR|RELBR);
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#endif
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emit4( immed.val );
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}
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else /* byte */ {
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#ifdef RELOCATION
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newrelo(immed.typ, RELO1);
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#endif
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emit1((int) immed.val);
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/* emit1((int) immed.val); ??? twice ??? */
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}
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}
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}
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| LDA R32 ',' src
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{ switch( oprtype[ SRC ] )
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{ case DA: case X: emit2( 0x7600 | $4<<4 | $2 );
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emit_ad( addr_inf );
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break;
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case BA: emit2( 0x3400 | $4<<4 | $2 );
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#ifdef RELOCATION
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newrelo(displ.typ,RELO2|RELBR);
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#endif
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emit2( (int) displ.val ); break;
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case BX: emit2( 0x7400 | $4<<4 | $2 );
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emit2( index<<8 ); break;
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default: argerr();
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}
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}
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| POP dst ',' ir
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{ chtype( DST, TYPE_pop );
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emit2( mode | $1 | $4<<4 | $2 );
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if ( mode>>12 == 4 ) emit_ad( addr_inf );
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}
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| PUSH ir ',' src
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{ chtype( SRC, TYPE_push );
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switch ( oprtype[ SRC ] )
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{ case IM: if ( $1 == 0x1100 ) /* pushl */ argerr();
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/* { emit2( 0x9109 | $2<<4 );
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** emit4( immed );
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** }
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*/
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else
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{ emit2( 0x0D09 | $2<<4 );
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#ifdef RELOCATION
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newrelo(immed.typ, RELO2|RELBR);
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#endif
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emit2( (int)immed.val );
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}
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break;
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default: emit2( mode | $1 | $2<<4 | $4 );
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if ( mode>>12 == 4 ) emit_ad( addr_inf );
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}
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}
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| LD dst ',' src
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{ if ( oprtype[ DST ] == REG )
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{ switch( oprtype[ SRC ] )
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{ case IM:
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if ( $1 == 0 ) /* ldb: F3.2 */
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{ /* fit(fits8(immed)); */
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emit1( 0xC000 | $2<<8);
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#ifdef RELOCATION
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newrelo(immed.typ, RELO1);
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#endif
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emit1((int) immed.val);
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}
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else
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{ /*fit(fits16(immed));*/
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emit2( 0x2100 | $2 );
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#ifdef RELOCATION
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newrelo(immed.typ, RELO2|RELBR);
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#endif
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emit2( (int)immed.val );
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}
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break;
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case REG: case IR: case DA: case X:
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setmode( SRC );
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emit2( mode | 0x2000 | $1 | $4<<4 | $2 );
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if ( mode>>12 == 4 ) emit_ad( addr_inf );
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break;
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case BA: emit2( 0x3000 | $1 | $4<<4 | $2 );
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#ifdef RELOCATION
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newrelo(displ.typ,RELO2|RELBR);
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#endif
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emit2( (int) displ.val );
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break;
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case BX: emit2( 0x7000 | $1 | $4<<4 | $2 );
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emit2( index<<8 );
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break;
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default: argerr();
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}
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break;
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}
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if ( oprtype[ SRC ] == REG )
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{ switch( oprtype[ DST ] )
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{ case IR: case DA: case X:
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setmode( DST );
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emit2( mode | 0x2E00 | $1 | $2<<4 | $4 );
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if ( mode>>12 == 4 ) emit_ad( addr_inf );
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break;
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case BA: emit2( 0x3200 | $1 | $2<<4 | $4 );
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#ifdef RELOCATION
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newrelo(displ.typ,RELO2|RELBR);
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#endif
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emit2( (int) displ.val );
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break;
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case BX: emit2( 0x7200 | $1 | $2<<4 | $4 );
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emit2( index<<8 );
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break;
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default: argerr();
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}
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break;
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}
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if ( oprtype[ SRC ] == IM ) /* F5.1 */
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{ chtype( DST, TYPE_ld );
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emit2( mode | 0xC05 | $1 | $2<<4 );
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if ( mode>>12 == 4 ) emit_ad( addr_inf );
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if ( $1 == 0 ) /* ldb */
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{ /* fit(fits8(immed)); */
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#ifdef RELOCATION
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newrelo(immed.typ, RELO1);
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#endif
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emit1((int) immed.val);
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/* emit1((int) immed.val); ??? twice ??? */
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}
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else /* ld */
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{ /*fit(fits16(immed));*/
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#ifdef RELOCATION
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newrelo(immed.typ, RELO2 | RELBR);
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#endif
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emit2( (int)immed.val );
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}
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break;
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}
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argerr();
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}
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| LDL dst ',' src
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{ if ( oprtype[ DST ] == REG )
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{ switch( oprtype[ SRC ] )
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{ case IM: emit2( 0x1400 | $2 );
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#ifdef RELOCATION
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newrelo(immed.typ, RELO4|RELBR|RELWR);
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#endif
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emit4( immed.val );
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break;
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case REG: case IR: case DA: case X:
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setmode( SRC );
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emit2( mode | 0x1400 | $4<<4 | $2 );
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if ( mode>>12 == 4 ) emit_ad( addr_inf );
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break;
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case BA: emit2( 0x3500 | $4<<4 | $2 );
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#ifdef RELOCATION
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newrelo(displ.typ,RELO2|RELBR);
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#endif
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emit2((int) displ.val );
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break;
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case BX: emit2( 0x7500 | $4<<4 | $2 );
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emit2( index<<8 );
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break;
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default: argerr();
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}
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break;
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}
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if ( oprtype[ SRC ] == REG )
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{ switch( oprtype[ DST ] )
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{ case IR: case DA: case X:
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setmode( DST );
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emit2( mode | 0x1D00 | $2<<4 | $4 );
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if ( mode>>12 == 4 ) emit_ad( addr_inf );
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break;
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case BA: emit2( 0x3700 | $2<<4 | $4 );
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#ifdef RELOCATION
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newrelo(displ.typ,RELO2|RELBR);
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#endif
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emit2( (int) displ.val );
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break;
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case BX: emit2( 0x7700 | $2<<4 | $4 );
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emit2( index<<8 );
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break;
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default: argerr();
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}
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break;
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}
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/* if ( oprtype[ SRC ] == IM )
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** { chtype( DST, TYPE_ld );
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** emit2( mode | 0xD07 | $2<<4 );
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** if ( mode>>12 == 4 ) emit_ad( addr_inf );
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** emit4( immed );
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** break;
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** }
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*/
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argerr();
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}
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;
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f3 : DJNZ reg ',' ra
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{ branch( $1 | $2<<8, $4 ); }
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| JR coco1 ra
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{ branch( $1 | $2<<8, $3 ); }
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| CALR ra
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{ branch( $1, $2 ); }
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;
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f4 : LDR reg ',' ra
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{ ldrel( $1 | $2, $4 ); }
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| LDR ra ',' reg
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{ ldrel( $1 | 0x200 | $4, $2 ); }
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| LDAR R32 ',' ra
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{ ldrel( $1 | $2, $4 ); }
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;
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f5 : F5_1L reg option
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{ if ( $3 < 0 )
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{ warning( "neg src results in a right shift!" );
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warning( "warning only");
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}
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shiftcode( $1 | $2<<4, $3 );
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}
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| F5_1R reg option2
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{ if ( $3 > 0 )
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{ warning( "pos src results in a left shift!" );
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warning( "warning only");
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}
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shiftcode( $1 | $2<<4, $3 );
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}
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;
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option2 : ',' imexpr
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{ $$ = $2; }
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| /* empty */
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{ $$ = -1; }
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;
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f6 : LDM dst ',' src ',' imexpr
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{ switch( oprtype[ DST ] )
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{ case REG: chtype( SRC, TYPE_ldm );
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ldmcode( $1 | $4<<4, $2, $6 );
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break;
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default: switch( oprtype[ SRC ] )
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{ case REG: chtype( DST, TYPE_ldm );
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ldmcode($1+8 | $2<<4, $4, $6);
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break;
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default: argerr();
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}
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}
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}
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| F6_4 ir ',' ir ',' R16
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{ /* For translate instructions the roles of $2 and $4
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** are interchanged with respect to the other
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** instructions of this group.
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*/
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if ( ($1 & 0xB8FF) == $1 )
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{ /* translate instruction */
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emit2( ($1 & ~0xF0) | $2<<4 );
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emit2( ($1 & 0xF0)>>4 | $6<<8 | $4<<4 );
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}
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else
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{ emit2( ($1 & ~0xF0) | $4<<4 );
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emit2( ($1 & 0xF0)>>4 | $6<<8 | $2<<4 );
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}
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}
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| F6_5 dst ',' ir ',' R16 coco2
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{ switch( oprtype[ DST ] )
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{ case REG: if ( bitset($1,1) ) argerr(); break;
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case IR : if ( !bitset($1,1) ) argerr(); break;
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default : argerr();
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}
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emit2( $1 | $4<<4 );
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emit2( $6<<8 | $2<<4 | $7 );
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}
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| F6_6 reg ',' R16
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{ emit2( $1 | $2<<4 );
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emit2( $4<<8 );
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}
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;
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f7 : IN reg ',' da
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{ emit2( $1 | 0xA04 | $2<<4 );
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#ifdef RELOCATION
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newrelo(adr_inf.typ, RELO2|RELBR);
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#endif
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emit2( (short)addr_inf.val ); /* i/o address */
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}
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| OUT da ',' reg
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{ emit2( $1 | 0xA06 | $4<<4 );
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#ifdef RELOCATION
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newrelo(adr_inf.typ, RELO2|RELBR);
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#endif
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emit2( (short)addr_inf.val ); /* i/o address */
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}
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| IN reg ',' ir
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{ if ( bitset($1,0) ) argerr();
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emit2( $1 | 0xC00 | $4<<4 | $2 );
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}
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| OUT ir ',' reg
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{ if ( bitset($1,0) ) argerr();
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emit2( $1 | 0xE00 | $2<<4 | $4 );
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}
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;
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f8 : LDCTL ctlargs
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{ emit2( $1 | $2 ); }
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| LDCTLB ctlbargs
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{ emit2( $1 | $2 ); }
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| MREQ reg
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{ emit2( $1 | $2<<4 ); }
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;
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ctlargs : CTLR ',' R16
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{ $$ = $3<<4 | $1 | 8; }
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| R16 ',' CTLR
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{ $$ = $1<<4 | $3; }
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;
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ctlbargs: CTLRFLAGS ',' R8
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{ $$ = $3<<4 | $1 | 8;}
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| R8 ',' CTLRFLAGS
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{ $$ = $1<<4 | $3; }
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;
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f9 : F9_1 flags
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{ emit2( $1 | $2 ); }
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| F9_2 ints
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{ emit2( $1 | $2 ); }
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| F9_3
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{ emit2( $1 ); }
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| RET
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{ emit2( $1 | 8 ); }
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| RET CC
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{ emit2( $1 | $2 ); }
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| SC imexpr
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{ fit(fit8($2));
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emit2( $1 | $2 );
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}
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;
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flags : flags ',' FLAG
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{ $$ = $1 | $3; }
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| FLAG
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{ $$ = $1; }
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;
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ints : ints ',' INTCB
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{ $$ = $1 | $3; }
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| INTCB
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{ $$ = $1; }
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;
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coco1 : CC ','
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{ $$ = $1; }
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| /* empty */
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{ $$ = 8; }
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;
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coco2 : ',' CC
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{ $$ = $2; }
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| /* empty */
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{ $$ = 8; }
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;
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option : ',' imexpr
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{ $$ = $2; }
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| /* empty */
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{ $$ = 1; }
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;
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/* `imexpr', just as `im', is used to implement immediate data.
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** But `imexpr' is used in those cases where the immediate value
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** always will fit into 16 bits, so (long) `immed' is not needed.
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** Those cases are in `option', `option2', f9-`SC', f6-`LDM' and
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** f1-`LDK'.
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*/
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imexpr : '$' absexp
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{ $$ = $2; }
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;
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/* Destination (dst) as well as source (src) operands never
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** have RA as addressing mode, except for some instructions of the
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** F3 and F4 instruction format group. In those cases RA is even
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** the only addressing mode which is allowed. This is why `ra'
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** has a yacc-rule not being part of `opr'.
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*/
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ra : expr
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{ $$ = $1; }
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;
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dst : { operand = DST;}
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opr
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{ $$ = $2; }
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;
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src : { operand = SRC;}
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opr
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{ $$ = $2; }
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;
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opr : reg
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{ settype( REG ); }
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| im
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{ settype( IM ); }
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| ir
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{ settype( IR ); }
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| da
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{ settype( DA ); }
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| x
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{ settype( X ); }
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| ba
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{ settype( BA ); }
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| bx
|
|
{ settype( BX ); }
|
|
;
|
|
reg : R8
|
|
| R16
|
|
| R32
|
|
| R64
|
|
;
|
|
im : '$' expr
|
|
{ $$ = 0;
|
|
immed = $2;
|
|
}
|
|
| '$' '<' '<' expr '>' '>' expr
|
|
{ $$ = 0;
|
|
immed.typ = combine($4.typ, $7.typ, '+');
|
|
immed.val = $4.val<<16 | $7.val;
|
|
}
|
|
;
|
|
ir : '*' R32
|
|
{ if ( $2 == 0 ) regerr();
|
|
$$ = $2;
|
|
}
|
|
;
|
|
da : expr
|
|
{ $$ = 0;
|
|
addr_inf = $1;
|
|
}
|
|
| '<' '<' expr '>' '>' expr
|
|
{ $$ = 0;
|
|
addr_inf.typ = combine( $3.typ, $6.typ, '+' );
|
|
addr_inf.val = $3.val<<16 | $6.val;
|
|
}
|
|
;
|
|
x : expr '(' R16 ')'
|
|
{ if ( $3 == 0 ) regerr();
|
|
$$ = $3;
|
|
addr_inf = $1;
|
|
}
|
|
| '<' '<' expr '>' '>' expr '(' R16 ')'
|
|
{ if ( $8 == 0 ) regerr();
|
|
$$ = $8;
|
|
addr_inf.typ = combine( $3.typ, $6.typ, '+' );
|
|
addr_inf.val = $3.val<<16 | $6.val;
|
|
}
|
|
;
|
|
ba : R32 '(' '$' expr ')'
|
|
{ if ( $1 == 0 ) regerr();
|
|
$$ = $1;
|
|
displ = $4;
|
|
}
|
|
;
|
|
bx : R32 '(' R16 ')'
|
|
{ if ( $1 == 0 || $3 == 0 ) regerr();
|
|
$$ = $1;
|
|
index = $3;
|
|
}
|
|
;
|