457 lines
19 KiB
C
457 lines
19 KiB
C
/*
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* (c) copyright 1987 by the Vrije Universiteit, Amsterdam, The Netherlands.
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* See the copyright notice in the ACK home directory, in the file "Copyright".
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*/
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#define RCSID3 "$Id$"
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/*
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* NS 16032 keywords
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*/
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/* Registers */
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{0, REG, 0, "r0"},
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{0, REG, 1, "r1"},
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{0, REG, 2, "r2"},
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{0, REG, 3, "r3"},
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{0, REG, 4, "r4"},
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{0, REG, 5, "r5"},
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{0, REG, 6, "r6"},
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{0, REG, 7, "r7"},
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{0, FREG, 0, "f0"},
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{0, FREG, 1, "f1"},
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{0, FREG, 2, "f2"},
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{0, FREG, 3, "f3"},
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{0, FREG, 4, "f4"},
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{0, FREG, 5, "f5"},
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{0, FREG, 6, "f6"},
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{0, FREG, 7, "f7"},
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/* CPU dedicated registers */
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{0, AREG, 0x0, "us"},
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{0, AREG, 0x8, "fp"},
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{0, AREG, 0x9, "sp"},
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{0, AREG, 0xA, "sb"},
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{0, AREG, 0xD, "psr"},
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{0, AREG, 0xE, "intbase"},
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{0, AREG, 0xF, "mod"},
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/* Tokens dedicated to addressing modes */
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{0, TOS, 0x17, "tos"},
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{0, EXTERNAL, 0x16, "external"},
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{0, PC, 0, "pc"},
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{0, INDICATOR, 'b', "b"},
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{0, INDICATOR, 'c', "c"},
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{0, INDICATOR, 'd', "d"},
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{0, INDICATOR, 'f', "f"},
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{0, INDICATOR, 'i', "i"},
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{0, INDICATOR, 'm', "m"},
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{0, INDICATOR, 'q', "q"},
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{0, INDICATOR, 'u', "u"},
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{0, INDICATOR, 'w', "w"},
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/* Memory management registers */
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{0, MREG, 0x0, "bpr0"},
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{0, MREG, 0x1, "bpr1"},
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{0, MREG, 0x4, "pf0"},
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{0, MREG, 0x5, "pf1"},
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{0, MREG, 0x8, "sc"},
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{0, MREG, 0xA, "msr"},
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{0, MREG, 0xB, "bcnt"},
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{0, MREG, 0xC, "ptb0"},
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{0, MREG, 0xD, "ptb1"},
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{0, MREG, 0xF, "eia"},
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/* Instruction types */
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/* Integer instructions */
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{0, ADD_I, mk_op2(0x5,I_BYTE,I_BYTE), "movb"},
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{0, ADD_I, mk_op2(0x5,I_WORD,I_WORD), "movw"},
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{0, ADD_I, mk_op2(0x5,I_DOUBLE,I_DOUBLE), "movd"},
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{0, ADD_I, mk_op2(0x1,I_BYTE,I_BYTE), "cmpb"},
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{0, ADD_I, mk_op2(0x1,I_WORD,I_WORD), "cmpw"},
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{0, ADD_I, mk_op2(0x1,I_DOUBLE,I_DOUBLE), "cmpd"},
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{0, ADD_I, mk_op2(0x0,I_BYTE,I_BYTE), "addb"},
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{0, ADD_I, mk_op2(0x0,I_WORD,I_WORD), "addw"},
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{0, ADD_I, mk_op2(0x0,I_DOUBLE,I_DOUBLE), "addd"},
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{0, ADD_I, mk_op2(0x4,I_BYTE,I_BYTE), "addcb"},
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{0, ADD_I, mk_op2(0x4,I_WORD,I_WORD), "addcw"},
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{0, ADD_I, mk_op2(0x4,I_DOUBLE,I_DOUBLE), "addcd"},
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{0, ADD_I, mk_op2(0x8,I_BYTE,I_BYTE), "subb"},
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{0, ADD_I, mk_op2(0x8,I_WORD,I_WORD), "subw"},
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{0, ADD_I, mk_op2(0x8,I_DOUBLE,I_DOUBLE), "subd"},
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{0, ADD_I, mk_op2(0xC,I_BYTE,I_BYTE), "subcb"},
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{0, ADD_I, mk_op2(0xC,I_WORD,I_WORD), "subcw"},
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{0, ADD_I, mk_op2(0xC,I_DOUBLE,I_DOUBLE), "subcd"},
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{0, COM, mk_op2(0x8,I_BYTE,I_BYTE), "negb"},
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{0, COM, mk_op2(0x8,I_WORD,I_WORD), "negw"},
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{0, COM, mk_op2(0x8,I_DOUBLE,I_DOUBLE), "negd"},
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{0, COM, mk_op2(0xC,I_BYTE,I_BYTE), "absb"},
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{0, COM, mk_op2(0xC,I_WORD,I_WORD), "absw"},
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{0, COM, mk_op2(0xC,I_DOUBLE,I_DOUBLE), "absd"},
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{0, MUL_I, mk_op2(0x8,I_BYTE,I_BYTE), "mulb"},
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{0, MUL_I, mk_op2(0x8,I_WORD,I_WORD), "mulw"},
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{0, MUL_I, mk_op2(0x8,I_DOUBLE,I_DOUBLE), "muld"},
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{0, MUL_I, mk_op2(0xF,I_BYTE,I_BYTE), "divb"},
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{0, MUL_I, mk_op2(0xF,I_WORD,I_WORD), "divw"},
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{0, MUL_I, mk_op2(0xF,I_DOUBLE,I_DOUBLE), "divd"},
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{0, MUL_I, mk_op2(0xE,I_BYTE,I_BYTE), "modb"},
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{0, MUL_I, mk_op2(0xE,I_WORD,I_WORD), "modw"},
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{0, MUL_I, mk_op2(0xE,I_DOUBLE,I_DOUBLE), "modd"},
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{0, MUL_I, mk_op2(0xC,I_BYTE,I_BYTE), "quob"},
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{0, MUL_I, mk_op2(0xC,I_WORD,I_WORD), "quow"},
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{0, MUL_I, mk_op2(0xC,I_DOUBLE,I_DOUBLE), "quod"},
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{0, MUL_I, mk_op2(0xD,I_BYTE,I_BYTE), "remb"},
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{0, MUL_I, mk_op2(0xD,I_WORD,I_WORD), "remw"},
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{0, MUL_I, mk_op2(0xD,I_DOUBLE,I_DOUBLE), "remd"},
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{0, ADD_I, mk_op2(0xA,I_BYTE,I_BYTE), "andb"},
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{0, ADD_I, mk_op2(0xA,I_WORD,I_WORD), "andw"},
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{0, ADD_I, mk_op2(0xA,I_DOUBLE,I_DOUBLE), "andd"},
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{0, ADD_I, mk_op2(0x6,I_BYTE,I_BYTE), "orb"},
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{0, ADD_I, mk_op2(0x6,I_WORD,I_WORD), "orw"},
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{0, ADD_I, mk_op2(0x6,I_DOUBLE,I_DOUBLE), "ord"},
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{0, ADD_I, mk_op2(0x2,I_BYTE,I_BYTE), "bicb"},
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{0, ADD_I, mk_op2(0x2,I_WORD,I_WORD), "bicw"},
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{0, ADD_I, mk_op2(0x2,I_DOUBLE,I_DOUBLE), "bicd"},
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{0, ADD_I, mk_op2(0xE,I_BYTE,I_BYTE), "xorb"},
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{0, ADD_I, mk_op2(0xE,I_WORD,I_WORD), "xorw"},
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{0, ADD_I, mk_op2(0xE,I_DOUBLE,I_DOUBLE), "xord"},
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{0, COM, mk_op2(0xD,I_BYTE,I_BYTE), "comb"},
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{0, COM, mk_op2(0xD,I_WORD,I_WORD), "comw"},
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{0, COM, mk_op2(0xD,I_DOUBLE,I_DOUBLE), "comd"},
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{0, COM, mk_op2(0x1,I_BYTE,I_BYTE), "ashb"},
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{0, COM, mk_op2(0x1,I_BYTE,I_WORD), "ashw"},
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{0, COM, mk_op2(0x1,I_BYTE,I_DOUBLE), "ashd"},
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{0, COM, mk_op2(0x5,I_BYTE,I_BYTE), "lshb"},
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{0, COM, mk_op2(0x5,I_BYTE,I_WORD), "lshw"},
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{0, COM, mk_op2(0x5,I_BYTE,I_DOUBLE), "lshd"},
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{0, COM, mk_op2(0x0,I_BYTE,I_BYTE), "rotb"},
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{0, COM, mk_op2(0x0,I_BYTE,I_WORD), "rotw"},
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{0, COM, mk_op2(0x0,I_BYTE,I_DOUBLE), "rotd"},
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{0, MOVID, mk_op2(0x4,I_BYTE,I_WORD), "movxbw"},
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{0, MOVID, mk_op2(0x7,I_BYTE,I_DOUBLE), "movxbd"},
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{0, MOVID, mk_op2(0x7,I_WORD,I_DOUBLE), "movxwd"},
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{0, MOVID, mk_op2(0x5,I_BYTE,I_WORD), "movzbw"},
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{0, MOVID, mk_op2(0x6,I_BYTE,I_DOUBLE), "movzbd"},
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{0, MOVID, mk_op2(0x6,I_WORD,I_DOUBLE), "movzwd"},
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#ifdef UNUSED
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{0, MOVID, mk_op2(0x7,I_DOUBLE,I_DOUBLE), "movxdd"},
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{0, MOVID, mk_op2(0x6,I_DOUBLE,I_DOUBLE), "movzdd"},
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#endif
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{0, ADD_I, mk_op2(0x9,I_DOUBLE,I_DOUBLE), "addr"},
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/* Quick integer instructions */
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{0, MOVQ, mk_op1(0x5,I_BYTE), "movqb"},
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{0, MOVQ, mk_op1(0x5,I_WORD), "movqw"},
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{0, MOVQ, mk_op1(0x5,I_DOUBLE), "movqd"},
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{0, MOVQ, mk_op1(0x1,I_BYTE), "cmpqb"},
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{0, MOVQ, mk_op1(0x1,I_WORD), "cmpqw"},
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{0, MOVQ, mk_op1(0x1,I_DOUBLE), "cmpqd"},
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{0, MOVQ, mk_op1(0x0,I_BYTE), "addqb"},
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{0, MOVQ, mk_op1(0x0,I_WORD), "addqw"},
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{0, MOVQ, mk_op1(0x0,I_DOUBLE), "addqd"},
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/* Extended integer instructions */
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{0, MUL_I, mk_op2(0x9,I_BYTE,I_BYTE), "meib"},
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{0, MUL_I, mk_op2(0x9,I_WORD,I_WORD), "meiw"},
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{0, MUL_I, mk_op2(0x9,I_DOUBLE,I_DOUBLE), "meid"},
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{0, MUL_I, mk_op2(0xB,I_BYTE,I_BYTE), "deib"},
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{0, MUL_I, mk_op2(0xB,I_WORD,I_WORD), "deiw"},
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{0, MUL_I, mk_op2(0xB,I_DOUBLE,I_DOUBLE), "deid"},
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/* Boolean instructions */
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{0, COM, mk_op2(0x9,I_BYTE,I_BYTE), "notb"},
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{0, COM, mk_op2(0x9,I_WORD,I_WORD), "notw"},
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{0, COM, mk_op2(0x9,I_DOUBLE,I_DOUBLE), "notd"},
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{0, SEQ, mk_op1c(0x3,I_BYTE,B_EQ), "seqb"},
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{0, SEQ, mk_op1c(0x3,I_WORD,B_EQ), "seqw"},
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{0, SEQ, mk_op1c(0x3,I_DOUBLE,B_EQ), "seqd"},
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{0, SEQ, mk_op1c(0x3,I_BYTE,B_NE), "sneb"},
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{0, SEQ, mk_op1c(0x3,I_WORD,B_NE), "snew"},
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{0, SEQ, mk_op1c(0x3,I_DOUBLE,B_NE), "sned"},
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{0, SEQ, mk_op1c(0x3,I_BYTE,B_CS), "scsb"},
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{0, SEQ, mk_op1c(0x3,I_WORD,B_CS), "scsw"},
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{0, SEQ, mk_op1c(0x3,I_DOUBLE,B_CS), "scsd"},
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{0, SEQ, mk_op1c(0x3,I_BYTE,B_CC), "sccb"},
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{0, SEQ, mk_op1c(0x3,I_WORD,B_CC), "sccw"},
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{0, SEQ, mk_op1c(0x3,I_DOUBLE,B_CC), "sccd"},
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{0, SEQ, mk_op1c(0x3,I_BYTE,B_HI), "shib"},
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{0, SEQ, mk_op1c(0x3,I_WORD,B_HI), "shiw"},
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{0, SEQ, mk_op1c(0x3,I_DOUBLE,B_HI), "shid"},
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{0, SEQ, mk_op1c(0x3,I_BYTE,B_LS), "slsb"},
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{0, SEQ, mk_op1c(0x3,I_WORD,B_LS), "slsw"},
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{0, SEQ, mk_op1c(0x3,I_DOUBLE,B_LS), "slsd"},
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{0, SEQ, mk_op1c(0x3,I_BYTE,B_GT), "sgtb"},
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{0, SEQ, mk_op1c(0x3,I_WORD,B_GT), "sgtw"},
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{0, SEQ, mk_op1c(0x3,I_DOUBLE,B_GT), "sgtd"},
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{0, SEQ, mk_op1c(0x3,I_BYTE,B_LE), "sleb"},
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{0, SEQ, mk_op1c(0x3,I_WORD,B_LE), "slew"},
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{0, SEQ, mk_op1c(0x3,I_DOUBLE,B_LE), "sled"},
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{0, SEQ, mk_op1c(0x3,I_BYTE,B_FS), "sfsb"},
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{0, SEQ, mk_op1c(0x3,I_WORD,B_FS), "sfsw"},
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{0, SEQ, mk_op1c(0x3,I_DOUBLE,B_FS), "sfsd"},
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{0, SEQ, mk_op1c(0x3,I_BYTE,B_FC), "sfcb"},
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{0, SEQ, mk_op1c(0x3,I_WORD,B_FC), "sfcw"},
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{0, SEQ, mk_op1c(0x3,I_DOUBLE,B_FC), "sfcd"},
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{0, SEQ, mk_op1c(0x3,I_BYTE,B_LO), "slob"},
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{0, SEQ, mk_op1c(0x3,I_WORD,B_LO), "slow"},
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{0, SEQ, mk_op1c(0x3,I_DOUBLE,B_LO), "slod"},
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{0, SEQ, mk_op1c(0x3,I_BYTE,B_HS), "shsb"},
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{0, SEQ, mk_op1c(0x3,I_WORD,B_HS), "shsw"},
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{0, SEQ, mk_op1c(0x3,I_DOUBLE,B_HS), "shsd"},
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{0, SEQ, mk_op1c(0x3,I_BYTE,B_LT), "sltb"},
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{0, SEQ, mk_op1c(0x3,I_WORD,B_LT), "sltw"},
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{0, SEQ, mk_op1c(0x3,I_DOUBLE,B_LT), "sltd"},
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{0, SEQ, mk_op1c(0x3,I_BYTE,B_GE), "sgeb"},
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{0, SEQ, mk_op1c(0x3,I_WORD,B_GE), "sgew"},
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{0, SEQ, mk_op1c(0x3,I_DOUBLE,B_GE), "sged"},
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#ifdef UNUSED
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{0, SEQ, mk_op1c(0x3,I_BYTE,B_TRUE), "strueb"},
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{0, SEQ, mk_op1c(0x3,I_WORD,B_TRUE), "struew"},
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{0, SEQ, mk_op1c(0x3,I_DOUBLE,B_TRUE), "strued"},
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{0, SEQ, mk_op1c(0x3,I_BYTE,B_FALSE), "sfalseb"},
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{0, SEQ, mk_op1c(0x3,I_WORD,B_FALSE), "sfalsew"},
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{0, SEQ, mk_op1c(0x3,I_DOUBLE,B_FALSE), "sfalsed"},
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#endif
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/* Bit instructions */
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{0, ADD_I, mk_op2(0xD,I_BYTE,I_BYTE), "tbitb"},
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{0, ADD_I, mk_op2(0xD,I_WORD,I_WORD), "tbitw"},
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{0, ADD_I, mk_op2(0xD,I_DOUBLE,I_DOUBLE), "tbitd"},
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{0, COM, mk_op2(0x6,I_BYTE,I_BYTE), "sbitb"},
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{0, COM, mk_op2(0x6,I_WORD,I_WORD), "sbitw"},
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{0, COM, mk_op2(0x6,I_DOUBLE,I_DOUBLE), "sbitd"},
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{0, COM, mk_op2(0x7,I_BYTE,I_BYTE), "sbitib"},
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{0, COM, mk_op2(0x7,I_WORD,I_WORD), "sbitiw"},
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{0, COM, mk_op2(0x7,I_DOUBLE,I_DOUBLE), "sbitid"},
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{0, COM, mk_op2(0x2,I_BYTE,I_BYTE), "cbitb"},
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{0, COM, mk_op2(0x2,I_WORD,I_WORD), "cbitw"},
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{0, COM, mk_op2(0x2,I_DOUBLE,I_DOUBLE), "cbitd"},
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{0, COM, mk_op2(0x3,I_BYTE,I_BYTE), "cbitib"},
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{0, COM, mk_op2(0x3,I_WORD,I_WORD), "cbitiw"},
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{0, COM, mk_op2(0x3,I_DOUBLE,I_DOUBLE), "cbitid"},
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{0, COM, mk_op2(0xE,I_BYTE,I_BYTE), "ibitb"},
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{0, COM, mk_op2(0xE,I_WORD,I_WORD), "ibitw"},
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{0, COM, mk_op2(0xE,I_DOUBLE,I_DOUBLE), "ibitd"},
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{0, CHECK, mk_op1(0x1,I_DOUBLE), "cvtp"},
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{0, FFS, mk_op2c(0x5,I_BYTE,I_BYTE,0), "ffsb"},
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{0, FFS, mk_op2c(0x5,I_WORD,I_BYTE,0), "ffsw"},
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{0, FFS, mk_op2c(0x5,I_DOUBLE,I_BYTE,0), "ffsd"},
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/* Field instructions */
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{0, INS, mk_op2(0x0,I_BYTE,I_BYTE), "extb"},
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{0, INS, mk_op2(0x0,I_WORD,I_WORD), "extw"},
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{0, INS, mk_op2(0x0,I_DOUBLE,I_DOUBLE), "extd"},
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{0, INSS, mk_op2(0x3,I_BYTE,I_BYTE), "extsb"},
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{0, INSS, mk_op2(0x3,I_WORD,I_WORD), "extsw"},
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{0, INSS, mk_op2(0x3,I_DOUBLE,I_DOUBLE), "extsd"},
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{0, INS, mk_op2(0x2,I_BYTE,I_BYTE), "insb"},
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{0, INS, mk_op2(0x2,I_WORD,I_WORD), "insw"},
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{0, INS, mk_op2(0x2,I_DOUBLE,I_DOUBLE), "insd"},
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{0, INSS, mk_op2(0x2,I_BYTE,I_BYTE), "inssb"},
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{0, INSS, mk_op2(0x2,I_WORD,I_WORD), "inssw"},
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{0, INSS, mk_op2(0x2,I_DOUBLE,I_DOUBLE), "inssd"},
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/* String instructions */
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{0, MOVS, mk_op1c(0x0,I_BYTE,0), "movsb"},
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{0, MOVS, mk_op1c(0x0,I_WORD,0), "movsw"},
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{0, MOVS, mk_op1c(0x0,I_DOUBLE,0), "movsd"},
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{0, MOVS, mk_op1c(0x0,I_BYTE,SO_TRANS), "movst"},
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{0, MOVS, mk_op1c(0x1,I_BYTE,0), "cmpsb"},
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{0, MOVS, mk_op1c(0x1,I_WORD,0), "cmpsw"},
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{0, MOVS, mk_op1c(0x1,I_DOUBLE,0), "cmpsd"},
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{0, MOVS, mk_op1c(0x1,I_BYTE,SO_TRANS), "cmpst"},
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{0, MOVS, mk_op1c(0x3,I_BYTE,0), "skpsb"},
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{0, MOVS, mk_op1c(0x3,I_WORD,0), "skpsw"},
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{0, MOVS, mk_op1c(0x3,I_DOUBLE,0), "skpsd"},
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{0, MOVS, mk_op1c(0x3,I_BYTE,SO_TRANS), "skpst"},
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/* Block instructions */
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{0, MOVM, mk_op2(0x0,I_BYTE,I_BYTE), "movmb"},
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{0, MOVM, mk_op2(0x0,I_WORD,I_WORD), "movmw"},
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{0, MOVM, mk_op2(0x0,I_DOUBLE,I_DOUBLE), "movmd"},
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{0, MOVM, mk_op2(0x1,I_BYTE,I_BYTE), "cmpmb"},
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{0, MOVM, mk_op2(0x1,I_WORD,I_WORD), "cmpmw"},
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{0, MOVM, mk_op2(0x1,I_DOUBLE,I_DOUBLE), "cmpmd"},
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/* Packed decimal instructions */
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{0, COM, mk_op2(0xF,I_BYTE,I_BYTE), "addpb"},
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{0, COM, mk_op2(0xF,I_WORD,I_WORD), "addpw"},
|
|
{0, COM, mk_op2(0xF,I_DOUBLE,I_DOUBLE), "addpd"},
|
|
{0, COM, mk_op2(0xB,I_BYTE,I_BYTE), "subpb"},
|
|
{0, COM, mk_op2(0xB,I_WORD,I_WORD), "subpw"},
|
|
{0, COM, mk_op2(0xB,I_DOUBLE,I_DOUBLE), "subpd"},
|
|
/* Array instructions */
|
|
{0, CHECK, mk_op2(0x4,I_BYTE,I_BYTE), "indexb"},
|
|
{0, CHECK, mk_op2(0x4,I_WORD,I_WORD), "indexw"},
|
|
{0, CHECK, mk_op2(0x4,I_DOUBLE,I_DOUBLE), "indexd"},
|
|
{0, CHECK, mk_op2(0x3,I_BYTE,I_BYTE), "checkb"},
|
|
{0, CHECK, mk_op2(0x3,I_WORD,I_WORD), "checkw"},
|
|
{0, CHECK, mk_op2(0x3,I_DOUBLE,I_DOUBLE), "checkd"},
|
|
/* Processor control instructions */
|
|
{0, JUMP, mk_op1(0x4,I_DOUBLE), "jump"},
|
|
{0, BR, mk_c(B_EQ), "beq"},
|
|
{0, BR, mk_c(B_NE), "bne"},
|
|
{0, BR, mk_c(B_CS), "bcs"},
|
|
{0, BR, mk_c(B_CC), "bcc"},
|
|
{0, BR, mk_c(B_HI), "bhi"},
|
|
{0, BR, mk_c(B_LS), "bls"},
|
|
{0, BR, mk_c(B_GT), "bgt"},
|
|
{0, BR, mk_c(B_LE), "ble"},
|
|
{0, BR, mk_c(B_FS), "bfs"},
|
|
{0, BR, mk_c(B_FC), "bfc"},
|
|
{0, BR, mk_c(B_LO), "blo"},
|
|
{0, BR, mk_c(B_HS), "bhs"},
|
|
{0, BR, mk_c(B_LT), "blt"},
|
|
{0, BR, mk_c(B_GE), "bge"},
|
|
{0, BR, mk_c(B_TRUE), "br"},
|
|
#ifdef UNUSED
|
|
{0, BR, mk_c(B_FALSE), "bfalse"},
|
|
#endif
|
|
{0, ADJSP, mk_op1(0xE,I_BYTE), "caseb"},
|
|
{0, ADJSP, mk_op1(0xE,I_WORD), "casew"},
|
|
{0, ADJSP, mk_op1(0xE,I_DOUBLE), "cased"},
|
|
{0, ACB, mk_op1(0x4,I_BYTE), "acbb"},
|
|
{0, ACB, mk_op1(0x4,I_WORD), "acbw"},
|
|
{0, ACB, mk_op1(0x4,I_DOUBLE), "acbd"},
|
|
{0, JSR, mk_op1(0xC,I_DOUBLE), "jsr"},
|
|
{0, BSR, mk_op(0x0), "bsr"},
|
|
{0, RET, mk_op(0x1), "ret"},
|
|
{0, RET, mk_op(0x2), "cxp"},
|
|
{0, ADJSP, mk_op1(0x0,I_DOUBLE), "cxpd"},
|
|
{0, RET, mk_op(0x3), "rxp"},
|
|
{0, RET, mk_op(0x4), "rett"},
|
|
{0, WAIT, mk_op(0x5), "reti"},
|
|
{0, WAIT, mk_op(0xC), "dia"},
|
|
/* Processor service instructions */
|
|
{0, ADJSP, mk_op1(0xA,I_BYTE), "adjspb"},
|
|
{0, ADJSP, mk_op1(0xA,I_WORD), "adjspw"},
|
|
{0, ADJSP, mk_op1(0xA,I_DOUBLE), "adjspd"},
|
|
{0, ADJSP, mk_op1(0x2,I_BYTE), "bicpsrb"},
|
|
{0, ADJSP, mk_op1(0x2,I_WORD), "bicpsrw"},
|
|
{0, ADJSP, mk_op1(0x6,I_BYTE), "bispsrb"},
|
|
{0, ADJSP, mk_op1(0x6,I_WORD), "bispsrw"},
|
|
#ifdef UNUSED
|
|
{0, ADJSP, mk_op1(0x2,I_DOUBLE), "bicpsrd"},
|
|
{0, ADJSP, mk_op1(0x6,I_DOUBLE), "bispsrd"},
|
|
#endif
|
|
{0, SAVE, mk_op(0x6), "save"},
|
|
{0, SAVE, mk_op(0x7), "restore"},
|
|
{0, ENTER, mk_op(0x8), "enter"},
|
|
{0, SAVE, mk_op(0x9), "exit"},
|
|
{0, LPR, mk_op1(0x6,I_BYTE), "lprb"},
|
|
{0, LPR, mk_op1(0x6,I_WORD), "lprw"},
|
|
{0, LPR, mk_op1(0x6,I_DOUBLE), "lprd"},
|
|
{0, LPR, mk_op1(0x2,I_BYTE), "sprb"},
|
|
{0, LPR, mk_op1(0x2,I_WORD), "sprw"},
|
|
{0, LPR, mk_op1(0x2,I_DOUBLE), "sprd"},
|
|
{0, SETCFG, mk_op1(0x2,I_DOUBLE), "setcfg"},
|
|
{0, WAIT, mk_op(0xF), "bpt"},
|
|
{0, WAIT, mk_op(0xD), "flag"},
|
|
{0, WAIT, mk_op(0xE), "svc"},
|
|
{0, WAIT, mk_op(0xA), "nop"},
|
|
{0, WAIT, mk_op(0xB), "wait"},
|
|
/* Memory management instructions */
|
|
{0, LMR, mk_op1(0x2,I_DOUBLE), "lmr"},
|
|
{0, LMR, mk_op1(0x3,I_DOUBLE), "smr"},
|
|
{0, RDVAL, mk_op1(0x0,I_DOUBLE), "rdval"},
|
|
{0, RDVAL, mk_op1(0x1,I_DOUBLE), "wrval"},
|
|
#ifdef SU_ASSEM
|
|
/* The assembler ref. man and the CPU description booklet differ
|
|
in the encoding of these instructions
|
|
*/
|
|
{0, FFS, mk_op2c(0x6,I_BYTE,I_BYTE,1), "movsub"},
|
|
{0, FFS, mk_op2c(0x6,I_WORD,I_WORD,1), "movsuw"},
|
|
{0, FFS, mk_op2c(0x6,I_DOUBLE,I_DOUBLE,1),"movsud"},
|
|
{0, FFS, mk_op2c(0x6,I_BYTE,I_BYTE,3), "movusb"},
|
|
{0, FFS, mk_op2c(0x6,I_WORD,I_WORD,3), "movusw"},
|
|
{0, FFS, mk_op2c(0x6,I_DOUBLE,I_DOUBLE,3),"movusd"},
|
|
#else
|
|
/* assembler reference manual version */
|
|
{0, FFS, mk_op2c(0x7,I_BYTE,I_BYTE,0), "movsub"},
|
|
{0, FFS, mk_op2c(0x7,I_WORD,I_WORD,0), "movsuw"},
|
|
{0, FFS, mk_op2c(0x7,I_DOUBLE,I_DOUBLE,0),"movsud"},
|
|
{0, FFS, mk_op2c(0x6,I_BYTE,I_BYTE,0), "movusb"},
|
|
{0, FFS, mk_op2c(0x6,I_WORD,I_WORD,0), "movusw"},
|
|
{0, FFS, mk_op2c(0x6,I_DOUBLE,I_DOUBLE,0),"movusd"},
|
|
#endif
|
|
/* Floating point instructions */
|
|
{0, ADD_F, mk_op2(0xD,F_FLOAT,F_FLOAT), "absf"},
|
|
{0, ADD_F, mk_op2(0xD,F_LONG,F_LONG), "absl"},
|
|
{0, ADD_F, mk_op2(0x0,F_FLOAT,F_FLOAT), "addf"},
|
|
{0, ADD_F, mk_op2(0x0,F_LONG,F_LONG), "addl"},
|
|
{0, ADD_F, mk_op2(0x2,F_FLOAT,F_FLOAT), "cmpf"},
|
|
{0, ADD_F, mk_op2(0x2,F_LONG,F_LONG), "cmpl"},
|
|
{0, ADD_F, mk_op2(0x8,F_FLOAT,F_FLOAT), "divf"},
|
|
{0, ADD_F, mk_op2(0x8,F_LONG,F_LONG), "divl"},
|
|
{0, ADD_F, mk_op2(0xC,F_FLOAT,F_FLOAT), "mulf"},
|
|
{0, ADD_F, mk_op2(0xC,F_LONG,F_LONG), "mull"},
|
|
{0, ADD_F, mk_op2(0x4,F_FLOAT,F_FLOAT), "subf"},
|
|
{0, ADD_F, mk_op2(0x4,F_LONG,F_LONG), "subl"},
|
|
{0, ADD_F, mk_op2(0x5,F_FLOAT,F_FLOAT), "negf"},
|
|
{0, ADD_F, mk_op2(0x5,F_LONG,F_LONG), "negl"},
|
|
{0, ADD_F, mk_op2(0x1,F_FLOAT,F_FLOAT), "movf"},
|
|
{0, ADD_F, mk_op2(0x1,F_LONG,F_LONG), "movl"},
|
|
{0, MOVIF, mk_op2(0x0,I_BYTE,F_FLOAT), "movbf"},
|
|
{0, MOVIF, mk_op2(0x0,I_WORD,F_FLOAT), "movwf"},
|
|
{0, MOVIF, mk_op2(0x0,I_DOUBLE,F_FLOAT), "movdf"},
|
|
{0, MOVIF, mk_op2(0x0,I_BYTE,F_LONG), "movbl"},
|
|
{0, MOVIF, mk_op2(0x0,I_WORD,F_LONG), "movwl"},
|
|
{0, MOVIF, mk_op2(0x0,I_DOUBLE,F_LONG), "movdl"},
|
|
{0, MOVFL, mk_op2(0x3,F_FLOAT,F_LONG), "movfl"},
|
|
{0, MOVFL, mk_op2(0x2,F_LONG,F_FLOAT), "movlf"},
|
|
{0, TRUNC, mk_op2(0x7,F_FLOAT,I_BYTE), "floorfb"},
|
|
{0, TRUNC, mk_op2(0x7,F_FLOAT,I_WORD), "floorfw"},
|
|
{0, TRUNC, mk_op2(0x7,F_FLOAT,I_DOUBLE), "floorfd"},
|
|
{0, TRUNC, mk_op2(0x7,F_LONG,I_BYTE), "floorlb"},
|
|
{0, TRUNC, mk_op2(0x7,F_LONG,I_WORD), "floorlw"},
|
|
{0, TRUNC, mk_op2(0x7,F_LONG,I_DOUBLE), "floorld"},
|
|
{0, TRUNC, mk_op2(0x4,F_FLOAT,I_BYTE), "roundfb"},
|
|
{0, TRUNC, mk_op2(0x4,F_FLOAT,I_WORD), "roundfw"},
|
|
{0, TRUNC, mk_op2(0x4,F_FLOAT,I_DOUBLE), "roundfd"},
|
|
{0, TRUNC, mk_op2(0x4,F_LONG,I_BYTE), "roundlb"},
|
|
{0, TRUNC, mk_op2(0x4,F_LONG,I_WORD), "roundlw"},
|
|
{0, TRUNC, mk_op2(0x4,F_LONG,I_DOUBLE), "roundld"},
|
|
{0, TRUNC, mk_op2(0x5,F_FLOAT,I_BYTE), "truncfb"},
|
|
{0, TRUNC, mk_op2(0x5,F_FLOAT,I_WORD), "truncfw"},
|
|
{0, TRUNC, mk_op2(0x5,F_FLOAT,I_DOUBLE), "truncfd"},
|
|
{0, TRUNC, mk_op2(0x5,F_LONG,I_BYTE), "trunclb"},
|
|
{0, TRUNC, mk_op2(0x5,F_LONG,I_WORD), "trunclw"},
|
|
{0, TRUNC, mk_op2(0x5,F_LONG,I_DOUBLE), "truncld"},
|
|
{0, LFSR, mk_op(0x1), "lfsr"},
|
|
{0, LFSR, mk_op(0x6), "sfsr"},
|
|
/* Slave processor instructions */
|
|
{0, LCR, mk_op1(0x2,I_DOUBLE), "lcr"}, /* Sure ? */
|
|
{0, LCR, mk_op1(0x3,I_DOUBLE), "scr"}, /* Sure ? */
|
|
{0, CATST, mk_op1(0x0,I_DOUBLE), "catst0"},/* Sure ? */
|
|
{0, CATST, mk_op1(0x1,I_DOUBLE), "catst1"},/* Sure ? */
|
|
{0, LCSR, mk_op1(0x1,S_DOUBLE), "lcsr"}, /* Sure ? */
|
|
{0, LCSR, mk_op1(0x6,S_DOUBLE), "scsr"}, /* Sure ? */
|
|
{0, CCVSI, mk_op2(0x7,S_DOUBLE,I_BYTE), "ccv0db"},
|
|
{0, CCVSI, mk_op2(0x7,S_DOUBLE,I_WORD), "ccv0dw"},
|
|
{0, CCVSI, mk_op2(0x7,S_DOUBLE,I_DOUBLE), "ccv0dd"},
|
|
{0, CCVSI, mk_op2(0x7,S_QUAD,I_BYTE), "ccv0qb"},
|
|
{0, CCVSI, mk_op2(0x7,S_QUAD,I_WORD), "ccv0qw"},
|
|
{0, CCVSI, mk_op2(0x7,S_QUAD,I_DOUBLE), "ccv0qd"},
|
|
{0, CCVSI, mk_op2(0x5,S_DOUBLE,I_BYTE), "ccv1db"},
|
|
{0, CCVSI, mk_op2(0x5,S_DOUBLE,I_WORD), "ccv1dw"},
|
|
{0, CCVSI, mk_op2(0x5,S_DOUBLE,I_DOUBLE), "ccv1dd"},
|
|
{0, CCVSI, mk_op2(0x5,S_QUAD,I_BYTE), "ccv1qb"},
|
|
{0, CCVSI, mk_op2(0x5,S_QUAD,I_WORD), "ccv1qw"},
|
|
{0, CCVSI, mk_op2(0x5,S_QUAD,I_DOUBLE), "ccv1qd"},
|
|
{0, CCVSI, mk_op2(0x4,S_DOUBLE,I_BYTE), "ccv2db"},
|
|
{0, CCVSI, mk_op2(0x4,S_DOUBLE,I_WORD), "ccv2dw"},
|
|
{0, CCVSI, mk_op2(0x4,S_DOUBLE,I_DOUBLE), "ccv2dd"},
|
|
{0, CCVSI, mk_op2(0x4,S_QUAD,I_BYTE), "ccv2qb"},
|
|
{0, CCVSI, mk_op2(0x4,S_QUAD,I_WORD), "ccv2qw"},
|
|
{0, CCVSI, mk_op2(0x4,S_QUAD,I_DOUBLE), "ccv2qd"},
|
|
{0, CCVIS, mk_op2(0x0,I_BYTE,S_DOUBLE), "ccv3bd"},
|
|
{0, CCVIS, mk_op2(0x0,I_WORD,S_DOUBLE), "ccv3wd"},
|
|
{0, CCVIS, mk_op2(0x0,I_DOUBLE,S_DOUBLE), "ccv3dd"},
|
|
{0, CCVIS, mk_op2(0x0,I_BYTE,S_QUAD), "ccv3bq"},
|
|
{0, CCVIS, mk_op2(0x0,I_WORD,S_QUAD), "ccv3wq"},
|
|
{0, CCVIS, mk_op2(0x0,I_DOUBLE,S_QUAD), "ccv3dq"},
|
|
{0, CCVSS, mk_op2(0x3,S_DOUBLE,S_QUAD), "ccv4dq"},
|
|
{0, CCVSS, mk_op2(0x2,S_QUAD,S_DOUBLE), "ccv5qd"},
|
|
{0, CMOV, mk_op2(0x0,S_DOUBLE,S_DOUBLE), "ccal0d"},
|
|
{0, CMOV, mk_op2(0x0,S_QUAD,S_QUAD), "ccal0q"},
|
|
{0, CMOV, mk_op2(0x4,S_DOUBLE,S_DOUBLE), "ccal1d"},
|
|
{0, CMOV, mk_op2(0x4,S_QUAD,S_QUAD), "ccal1q"},
|
|
{0, CMOV, mk_op2(0xC,S_DOUBLE,S_DOUBLE), "ccal2d"},
|
|
{0, CMOV, mk_op2(0xC,S_QUAD,S_QUAD), "ccal2q"},
|
|
{0, CMOV, mk_op2(0x8,S_DOUBLE,S_DOUBLE), "ccal3d"},
|
|
{0, CMOV, mk_op2(0x8,S_QUAD,S_QUAD), "ccal3q"},
|
|
{0, CMOV, mk_op2(0x2,S_DOUBLE,S_DOUBLE), "ccmpd"},
|
|
{0, CMOV, mk_op2(0x2,S_QUAD,S_QUAD), "ccmpq"},
|
|
{0, CMOV, mk_op2(0x1,S_DOUBLE,S_DOUBLE), "cmov0d"},
|
|
{0, CMOV, mk_op2(0x1,S_QUAD,S_QUAD), "cmov0q"},
|
|
{0, CMOV, mk_op2(0xD,S_DOUBLE,S_DOUBLE), "cmov1d"},
|
|
{0, CMOV, mk_op2(0xD,S_QUAD,S_QUAD), "cmov1q"},
|
|
{0, CMOV, mk_op2(0x5,S_DOUBLE,S_DOUBLE), "cmov2d"},
|
|
{0, CMOV, mk_op2(0x5,S_QUAD,S_QUAD), "cmov2q"},
|