ack/mach/vc4/test/opcodes.s
David Given 32ebc502c8 Skeleton of VideoCore IV support for the Raspberry Pi.
--HG--
branch : dtrg-videocore
rename : mach/powerpc/as/.distr => mach/vc4/as/.distr
rename : mach/powerpc/as/mach0.c => mach/vc4/as/mach0.c
rename : mach/powerpc/as/mach1.c => mach/vc4/as/mach1.c
rename : mach/powerpc/as/mach2.c => mach/vc4/as/mach2.c
rename : mach/powerpc/as/mach3.c => mach/vc4/as/mach3.c
rename : mach/powerpc/as/mach4.c => mach/vc4/as/mach4.c
rename : mach/powerpc/as/mach5.c => mach/vc4/as/mach5.c
rename : mach/i86/build.mk => mach/vc4/build.mk
rename : mach/powerpc/libem/powerpc.h => mach/vc4/libem/videocore.h
rename : mach/i86/libend/.distr => mach/vc4/libend/.distr
rename : mach/i86/libend/edata.s => mach/vc4/libend/edata.s
rename : mach/i86/libend/em_end.s => mach/vc4/libend/em_end.s
rename : mach/i86/libend/end.s => mach/vc4/libend/end.s
rename : mach/i86/libend/etext.s => mach/vc4/libend/etext.s
rename : mach/powerpc/ncg/.distr => mach/vc4/ncg/.distr
rename : mach/powerpc/ncg/mach.c => mach/vc4/ncg/mach.c
rename : mach/powerpc/ncg/mach.h => mach/vc4/ncg/mach.h
rename : mach/powerpc/ncg/table => mach/vc4/ncg/table
rename : plat/pc86/descr => plat/rpi/descr
2013-05-17 00:03:38 +01:00

78 lines
984 B
ArmAsm

#
/*
* VideoCore IV assembler test file
* © 2013 David Given
* This file is redistributable under the terms of the 3-clause BSD license.
* See the file 'Copying' in the root of the distribution for the full text.
*/
.sect .text
.sect .rom
.sect .data
.sect .bss
.sect .text
main:
nop
rti
b r0
b r31
bl r0
bl r31
tbb r0
tbb r15
tbs r0
tbs r15
mov r0, r1
cmn r0, r1
add r0, r1
bic r0, r1
mul r0, r1
eor r0, r1
sub r0, r1
and r0, r1
mvn r0, r1
ror r0, r1
cmp r0, r1
rsb r0, r1
btst r0, r1
or r0, r1
extu r0, r1
max r0, r1
bset r0, r1
min r0, r1
bclr r0, r1
adds2 r0, r1
bchg r0, r1
adds4 r0, r1
adds8 r0, r1
adds16 r0, r1
exts r0, r1
neg r0, r1
lsr r0, r1
clz r0, r1
lsl r0, r1
brev r0, r1
asr r0, r1
abs r0, r1
mov r0, #31
cmn r0, #31
add r0, #31
bic r0, #31
mul r0, #31
eor r0, #31
sub r0, #31
and r0, #31
mvn r0, #31
ror r0, #31
cmp r0, #31
rsb r0, #31
btst r0, #31
or r0, #31
extu r0, #31
max r0, #31