032bcffef6
The new features are the hi16/lo16 and ha16/lo16 syntax for relocations, and the extended mnemonics like "blr". Use ha16/lo16 to load some double floats with 2 instructions (lis/lfd) instead of 3 (lis/ori/lfd). Use the extended names for branches, comparisons, and bit rotations, so I can more easily read the code. The new names often encode the same machine instructions as the old names, except in a few places where I changed the instructions. Stop using andi. when we don't need to set cr0. In inn.s, I change andi. to extrwi to extract the same bits. In los.s and sts.s, I change "andi. r3, r3, ~3" to "clrrwi r3, r3, 2". This avoids setting cr0 and also stops clearing the high 16 bits of r3. In csa.s, los.s, sts.s, I change some comparisons and right shifts from signed to unsigned (cmplw, cmplwi, srwi), because the sizes are unsigned. In inn.s, the right shift can be signed (sraw) or unsigned (srw), but I use srw because we don't need the carry bit. In fef8.s, I save an instruction by using rlwinm instead of addis/andc to rlwinm to clear a field. The code no longer kills r7. In both fef8.s and fif8.s, I remove the list of killed registers. Also remove some whitespace from ends of lines.
38 lines
637 B
ArmAsm
38 lines
637 B
ArmAsm
.sect .text
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! Converts a 64-bit double into a 32-bit unsigned integer.
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!
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! Stack: ( double -- uint )
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.define .cfu8
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.cfu8:
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lis r3, ha16[.fd_00000000]
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lfd f0, lo16[.fd_00000000](r3) ! f0 = 0.0
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lfd f1, 0(sp) ! value to be converted
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lis r3, ha16[.fd_FFFFFFFF]
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lfd f3, lo16[.fd_FFFFFFFF](r3) ! f3 = 0xFFFFFFFF
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lis r3, ha16[.fd_80000000]
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lfd f4, lo16[.fd_80000000](r3) ! f4 = 0x80000000
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fsel f2, f1, f1, f0
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fsub f5, f3, f1
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fsel f2, f5, f2, f3
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fsub f5, f2, f4
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fcmpu cr0, f2, f4
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fsel f2, f5, f5, f2
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fctiwz f2, f2
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stfd f2, 0(sp)
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addi sp, sp, 4
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bltlr
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lwz r3, 0(sp)
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xoris r3, r3, 0x8000
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stw r3, 0(sp)
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blr
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