225 lines
5 KiB
Plaintext
225 lines
5 KiB
Plaintext
add dst:REG, src:EADDR ==> @text1( 0x3);
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mod_RM( dst->reg, src).
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... dst:ACCU, src:DATA ==> @text1( 0x5);
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@text4( %$(src->expr)).
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... dst:EADDR, src:DATA ==> small_RMconst(0x81, 0, dst, src).
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and dst:REG, src:EADDR ==> @text1( 0x23);
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mod_RM( dst->reg, src).
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... dst:ACCU, src:DATA ==> @text1( 0x25);
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@text4( %$(src->expr)).
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call dst:lABEL ==> @text1( 0xe8);
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@reloc4( %$(dst->lab), %$(dst->off), PC_REL).
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... dst:EADDR ==> @text1( 0xff);
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mod_RM( 2, dst).
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cdq ==> @text1(0x99).
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cmp dst:REG, src:EADDR ==> @text1( 0x3b);
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mod_RM( dst->reg, src).
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... dst:ACCU, src:DATA ==> @text1( 0x3d);
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@text4( %$(src->expr)).
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... dst:EADDR, src:DATA ==> small_RMconst(0x81, 7, dst, src).
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dec dst:REG ==> R53( 9, dst->reg).
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... dst:EADDR ==> @text1( 0xff);
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mod_RM( 1, dst).
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div divisor:EADDR ==> @text1( 0xf7);
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mod_RM( 6, divisor).
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enter nm:DATA, nm1:DATA ==> @text1( 0xc8);
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@text2( %$(nm->expr));
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@text1( %$(nm1->expr)).
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idiv divisor:EADDR ==> @text1( 0xf7);
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mod_RM( 7, divisor).
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imul mplier:EADDR ==> @text1( 0xf7);
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mod_RM( 5, mplier).
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inc dst:REG ==> R53( 8, dst->reg).
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... dst:EADDR ==> @text1( 0xff);
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mod_RM( 0, dst).
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jb dst:ILB ==> @text1( 0x72);
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@text1( %dist( dst->lab)).
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... dst:lABEL ==> @text1(0x0f);
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@text1(0x82);
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@reloc4( %$(dst->lab), %$(dst->off), PC_REL).
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je dst:ILB ==> @text1( 0x74);
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@text1( %dist( dst->lab)).
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... dst:lABEL ==> @text1(0x0f);
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@text1(0x84);
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@reloc4( %$(dst->lab), %$(dst->off), PC_REL).
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jg dst:ILB ==> @text1( 0x7f);
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@text1( %dist( dst->lab)).
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... dst:lABEL ==> @text1(0x0f);
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@text1(0x8f);
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@reloc4( %$(dst->lab), %$(dst->off), PC_REL).
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jge dst:ILB ==> @text1( 0x7d);
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@text1( %dist( dst->lab)).
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... dst:lABEL ==> @text1(0x0f);
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@text1(0x8d);
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@reloc4( %$(dst->lab), %$(dst->off), PC_REL).
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jl dst:ILB ==> @text1( 0x7c);
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@text1( %dist( dst->lab)).
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... dst:lABEL ==> @text1(0x0f);
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@text1(0x8c);
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@reloc4( %$(dst->lab), %$(dst->off), PC_REL).
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jle dst:ILB ==> @text1( 0x7e);
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@text1( %dist( dst->lab)).
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... dst:lABEL ==> @text1(0x0f);
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@text1(0x8e);
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@reloc4( %$(dst->lab), %$(dst->off), PC_REL).
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jmp dst:ILB ==> @text1( 0xeb);
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@text1( %dist( dst->lab)).
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... dst:lABEL ==> @text1( 0xe9);
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@reloc4( %$(dst->lab), %$(dst->off), PC_REL).
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jne dst:ILB ==> @text1( 0x75);
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@text1( %dist( dst->lab)).
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... dst:lABEL ==> @text1(0x0f);
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@text1(0x85);
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@reloc4( %$(dst->lab), %$(dst->off), PC_REL).
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lea dst:REG, src:EADDR ==> @text1( 0x8d);
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mod_RM( dst->reg, src).
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loop dst:ILB ==> @text1( 0xe2);
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@text1( %dist( dst->lab)).
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mov dst:REG, src:EADDR ==> mv_RG_EADDR( dst, src).
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... dst:REG, src:DATA ==> R53( 0x17, dst->reg);
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@text4(%$(src->expr)).
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... dst:EADDR, src:REG ==> @text1( 0x89);
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mod_RM( src->reg, dst).
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... dst:EADDR, src:DATA ==> @text1( 0xc7);
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mod_RM( 0, dst);
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@text4( %$(src->expr)).
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... dst:EADDR, src:lABEL ==> @text1( 0xc7);
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mod_RM( 0, dst);
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@reloc4( %$(src->lab), %$(src->off), ABSOLUTE).
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movw dst:EADDR, src:REG ==> @text1( 0x66); /* operand size prefix */
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@text1( 0x89);
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mod_RM( src->reg, dst).
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movb dst:EADDR, src:REG ==> @text1( 0x88);
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mod_RM( src->reg, dst).
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movzxb dst:REG, src:EADDR ==> @text1(0x0f);
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@text1(0xb6);
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mod_RM(dst->reg, src).
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movzx dst:REG, src:EADDR ==> @text1(0x0f);
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@text1(0xb7);
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mod_RM(dst->reg, src).
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mul mplier:EADDR ==> @text1( 0xf7);
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mod_RM( 4, mplier).
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neg dst:EADDR ==> @text1( 0xf7);
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mod_RM( 3, dst).
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not dst:EADDR ==> @text1( 0xf7);
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mod_RM( 2, dst).
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or dst:REG, src:EADDR ==> @text1( 0x0b);
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mod_RM( dst->reg, src).
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pop dst:REG ==> R53( 0xb, dst->reg).
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... dst:EADDR ==> @text1( 0x8f);
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mod_RM( 0, dst).
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/*
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POP dst ==> @if ( push_waiting)
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mov_instr( dst, AX_oper);
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@assign( push_waiting, FALSE).
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@else
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pop_instr( dst).
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@fi.
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*/
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push src:REG ==> R53( 0xa, src->reg).
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... src:DATA ==> small_const(0x68, src).
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... src:lABEL ==> @text1(0x68);
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@reloc4(%$(src->lab), %$(src->off), ABSOLUTE).
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... src:EADDR ==> @text1( 0xff);
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mod_RM( 6, src).
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/*
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PUSH src ==> mov_instr( AX_oper, src);
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@assign( push_waiting, TRUE).
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*/
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ret ==> @text1( 0xc3). /* Always NEAR! */
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leave ==> @text1( 0xc9). /* Always NEAR! */
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rol dst:EADDR, src:REG_CL ==> @text1( 0xd3);
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mod_RM( 0, dst).
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ror dst:EADDR, src:REG_CL ==> @text1( 0xd3);
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mod_RM( 1, dst).
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sal dst:EADDR, src:REG_CL ==> @text1( 0xd3);
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mod_RM( 4, dst).
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sar dst:EADDR, src:REG_CL ==> @text1( 0xd3);
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mod_RM( 7, dst).
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... dst:EADDR, src:DATA ==> @text1( 0xc1);
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mod_RM( 7, dst);
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@text1(%$(src->expr)).
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shl dst:EADDR, src:REG_CL ==> @text1(0xd3);
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mod_RM(4, dst).
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shr dst:EADDR, src:REG_CL ==> @text1( 0xd3);
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mod_RM( 5, dst).
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sub dst:REG, src:EADDR ==> @text1( 0x2b);
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mod_RM( dst->reg, src).
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... dst:EADDR, src:DATA ==> small_RMconst(0x81, 5, dst, src).
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test dst:REG, src:EADDR ==> @text1( 0x85);
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mod_RM( dst->reg, src).
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xchg dst:EADDR, src:REG ==> @text1( 0x87);
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mod_RM( src->reg, dst).
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xor dst:REG, src:EADDR ==> @text1( 0x33);
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mod_RM( dst->reg, src).
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