77 lines
1.9 KiB
C
77 lines
1.9 KiB
C
/*
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* (c) copyright 1987 by the Vrije Universiteit, Amsterdam, The Netherlands.
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* See the copyright notice in the ACK home directory, in the file "Copyright".
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*/
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#define RCSID1 "$Header$"
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/*
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* INTEL 80386 C declarations
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*/
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#define low6(z) (z & 077)
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#define fit6(z) (low6(z) == z)
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#define low3(z) (z & 07)
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#define fit3(z) (low3(z) == z)
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#define FESC 0xD8 /* escape for 80[23]87 processor */
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#define ufitb(z) ((unsigned)(z) <= 255)
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#define IS_R8 0x100
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#define IS_R32 0x200
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#define IS_EXPR 0x400
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#define IS_RSEG 0x800
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#define is_expr(reg) ((reg)&IS_EXPR)
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#define is_segreg(reg) ((reg)&IS_RSEG)
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#define is_reg(reg) (((reg)&(IS_R8|IS_R32)) != 0)
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#define is_acc(reg) ((reg) != 0 && ((reg)&(IS_R8|IS_R32)) == (reg))
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struct operand {
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int mod;
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int rm;
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int reg;
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int sib; /* scale-index-base */
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expr_t exp;
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};
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extern struct operand op_1, op_2;
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#define mod_1 op_1.mod
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#define mod_2 op_2.mod
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#define rm_1 op_1.rm
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#define rm_2 op_2.rm
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#define reg_1 op_1.reg
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#define reg_2 op_2.reg
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#define sib_1 op_1.sib
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#define sib_2 op_2.sib
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#define exp_1 op_1.exp
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#define exp_2 op_2.exp
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#ifdef RELOCATION
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extern int rel_1, rel_2;
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#endif
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#ifndef extern
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extern char regindex_ind[8][8];
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#else
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/* First index is base register; second index is index register;
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sp cannot be an index register.
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For base and index register indirect mode, bp cannot be the
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base register, but this info is not included in this array.
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This can always be handled by using the base and index register with
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displacement mode.
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*/
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char regindex_ind[8][8] = {
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000, 010, 020, 030, -1, 050, 060, 070,
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001, 011, 021, 031, -1, 051, 061, 071,
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002, 012, 022, 032, -1, 052, 062, 072,
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003, 013, 023, 033, -1, 053, 063, 073,
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004, 014, 024, 034, -1, 054, 064, 074,
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005, 015, 025, 035, -1, 055, 065, 075,
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006, 016, 026, 036, -1, 056, 066, 076,
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007, 017, 027, 037, -1, 057, 067, 077,
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};
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#endif
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extern int address_long INIT(1), operand_long INIT(1);
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