96 lines
		
	
	
	
		
			2.7 KiB
		
	
	
	
		
			Groff
		
	
	
	
	
	
			
		
		
	
	
			96 lines
		
	
	
	
		
			2.7 KiB
		
	
	
	
		
			Groff
		
	
	
	
	
	
.\" $Header$
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.TH 6805_AS 1
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.ad
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.SH NAME
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6805_as \- assembler for Motorola 6805
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.SH SYNOPSIS
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/usr/em/lib/6805_as [options] argument ...
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.SH DESCRIPTION
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This assembler is made with the general framework
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described in \fIuni_ass\fP(6).
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.SH SYNTAX
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.IP registers
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The 6805 has an accumulator register A and an index register X. An
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instruction (from the read-modify-write group) that references the
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A-register has an "a" suffixed to the mnemonic. In a similar way
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the X-register, apart from indexing operations, is addressed with
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an "x" suffix, i.e. "lsra" and "negx".
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.IP "addressing modes"
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The assembler automatically selects the shortest opcode if
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appropriate and possible. Thus "sub 10" will use the direct
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addressing mode whereas "neg 0,x" will use indexed (no offset) mode.
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There are sick constructions where the assembler can't find out
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the shortest form in time. In those cases the longest form is used.
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.br
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Branches are handled in much the same way. If a branch is out of
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range it is replaced by a reversed condition branch, followed by
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a jump, automatically.
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.sp
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.nf
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.ta 8n 16n 24n 32n 40n 48n
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syntax		meaning (name)
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#expr		a one byte value (immediate)
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<expr		1-byte zero page address. Allowed in  
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		the register/memory and read-modify-
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		write instruction groups. (direct)
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>expr		2-byte address. Allowed in the register
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		memory group. (extended)
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expr		1-byte address if appropriate, 2-byte 
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		in other cases. (auto-direct/extended)
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,x		indexed with zero offset. (indexed)
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<expr,x		indexed with 8 bit offset. (indexed-1)
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>expr,x		indexed with 16 bit offset. (indexed-2)
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expr,x		indexed with the shortest possible off-
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		set. (auto indexed)
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bit,expr	bit number and direct address. 
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		(bit set/clear)
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bit,expr,tag	bit number, direct address and branch 
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		tag. Automatically changed to reversed 
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		condition branch and jump if appropri-
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		ate. (bit test and branch)
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tag		branch tag. Converted to reversed con-
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		dition branch and jump if appropriate. 
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		(branch)
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.fi
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.IP "PSEUDO INSTRUCTIONS"
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 .dram		use the zero page ram/io segment.
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 .dprom		use the zero page (ep)rom segment.
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 .cmos		assemble cmos version instructions.
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.SH "SEE ALSO"
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uni_ass(6),
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ack(1),
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.br
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M6805 HMOS, M146805 CMOS family, Motorola, 
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Prentice-Hall, Inc., 1983, (ISBN 0-13-541375-3).
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.SH EXAMPLE
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An example of Motorola 6805 assembly code.
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.sp 2
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.nf
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.ta 8n 16n 32n 40n 48n 56n 64n
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	.dram
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	one:	.space	1		! a-port
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	.dprom
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	c1:	.byte	1
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	.text
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	start:	ldx	#c1		! load address of c1
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		txa
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		sta	one
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		add	c1		! add one
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		brset	1,one,whoop	! jif bit one of aport 
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		bset	1,one		! set it now
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	.data
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		.ascii	"unused string"
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	.text
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	whoop:	nop
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	.org 0xff8
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		.word	start		! set vector address
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	.text	
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		nop			! resume code
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.fi
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.SH AUTHOR
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Written by Gijs Mos.
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Not a member of the ACK group.
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.SH BUGS
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The assembler has not been well tested. 
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