ba9b021253
Our libem had two implementations of loading a block from a stack, one for lar 4 and one for los 4. Now lar 4 and los 4 share the code in .los4. Likewise, sar 4 and sts 4 share the code in .sts4. Rename .los to .los4 and .sts to .sts4, because they implement los 4 and sts 4. Remove the special case for loading or storing 4 bytes, because we can do it with 1 iteration of the loop. Remove the lines to "align size" where the size must already be a multiple of 4. Fix the upper bound check in .aar4. Change .aar4, .lar4, .los4, .sar4, .sts4 to pass all operands on the real stack, except that .los4 and .sts4 take the size in register r3. Have .aar4 set r3 to the size of the array element. So lar 4 is just .aar4 then .los4, and sar 4 is just .aar4 then .sts4. ncg no longer calls .lar4 and .sar4 in libem, because it inlines the code; but I keep .lar4 and .sar4 in libem, because mcg references them. They might or might not work in mcg.
33 lines
869 B
ArmAsm
33 lines
869 B
ArmAsm
.sect .text
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! Get address of element of bounds-checked array.
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!
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! Stack: ( array-adr index descriptor-adr -- element-adr )
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! Sets r3 = size of element for .los4, .sts4
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! Preserves r10 for .lar4, .sar4
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.define .aar4
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.aar4:
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lis r0, hi16[.trap_earray]
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ori r0, r0, lo16[.trap_earray]
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mtspr ctr, r0 ! load CTR with trap address
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lwz r4, 0(sp) ! r4 = address of descriptor
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lwz r5, 4(sp) ! r5 = index
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lwz r6, 8(sp) ! r6 = address of array
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lwz r0, 0(r4)
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subf. r5, r0, r5 ! subtract lower bound from index
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bltctr ! check lower bound
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lwz r0, 4(r4)
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cmplw r5, r0
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bgtctr ! check upper bound
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lwz r3, 8(r4) ! r3 = size of element
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mullw r5, r5, r3 ! scale index by size
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add r6, r6, r5
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stw r6, 8(sp) ! push address of element
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addi sp, sp, 8
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