799900f45a
latest version of musashi engine includes floating point emulation (plus a few patches to add in missing opcodes needed by ack - see tags JFF & TBB) added a few missing linux syscalls in sim.c pascal now runs pretty well quick test with modula2 passes c gets the floating point numbers wrong, so more work needed here other languages untested plat/linux68k/emu/build.lua is probably not quite right - the softfloat directory is compiled in the wrong place
460 lines
17 KiB
C
460 lines
17 KiB
C
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/*============================================================================
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This C header file is part of the SoftFloat IEC/IEEE Floating-point Arithmetic
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Package, Release 2b.
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Written by John R. Hauser. This work was made possible in part by the
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International Computer Science Institute, located at Suite 600, 1947 Center
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Street, Berkeley, California 94704. Funding was partially provided by the
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National Science Foundation under grant MIP-9311980. The original version
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of this code was written as part of a project to build a fixed-point vector
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processor in collaboration with the University of California at Berkeley,
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overseen by Profs. Nelson Morgan and John Wawrzynek. More information
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is available through the Web page `http://www.cs.berkeley.edu/~jhauser/
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arithmetic/SoftFloat.html'.
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THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
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been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
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RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
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AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
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COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
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EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
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INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
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OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
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Derivative works are acceptable, even for commercial purposes, so long as
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(1) the source code for the derivative work includes prominent notice that
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the work is derivative, and (2) the source code includes prominent notice with
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these four paragraphs for those parts of this code that are retained.
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=============================================================================*/
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/*----------------------------------------------------------------------------
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| The macro `FLOATX80' must be defined to enable the extended double-precision
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| floating-point format `floatx80'. If this macro is not defined, the
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| `floatx80' type will not be defined, and none of the functions that either
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| input or output the `floatx80' type will be defined. The same applies to
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| the `FLOAT128' macro and the quadruple-precision format `float128'.
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*----------------------------------------------------------------------------*/
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#define FLOATX80
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#define FLOAT128
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/*----------------------------------------------------------------------------
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| Software IEC/IEEE floating-point types.
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*----------------------------------------------------------------------------*/
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typedef bits32 float32;
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typedef bits64 float64;
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#ifdef FLOATX80
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typedef struct {
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bits16 high;
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bits64 low;
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} floatx80;
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#endif
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#ifdef FLOAT128
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typedef struct {
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bits64 high, low;
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} float128;
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#endif
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/*----------------------------------------------------------------------------
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| Primitive arithmetic functions, including multi-word arithmetic, and
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| division and square root approximations. (Can be specialized to target if
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| desired.)
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*----------------------------------------------------------------------------*/
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#include "softfloat-macros"
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/*----------------------------------------------------------------------------
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| Software IEC/IEEE floating-point underflow tininess-detection mode.
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*----------------------------------------------------------------------------*/
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extern int8 float_detect_tininess;
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enum {
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float_tininess_after_rounding = 0,
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float_tininess_before_rounding = 1
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};
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/*----------------------------------------------------------------------------
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| Software IEC/IEEE floating-point rounding mode.
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*----------------------------------------------------------------------------*/
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extern int8 float_rounding_mode;
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enum {
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float_round_nearest_even = 0,
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float_round_to_zero = 1,
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float_round_down = 2,
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float_round_up = 3
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};
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/*----------------------------------------------------------------------------
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| Software IEC/IEEE floating-point exception flags.
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*----------------------------------------------------------------------------*/
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extern int8 float_exception_flags;
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enum {
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float_flag_invalid = 0x01, float_flag_denormal = 0x02, float_flag_divbyzero = 0x04, float_flag_overflow = 0x08,
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float_flag_underflow = 0x10, float_flag_inexact = 0x20
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};
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/*----------------------------------------------------------------------------
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| Routine to raise any or all of the software IEC/IEEE floating-point
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| exception flags.
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*----------------------------------------------------------------------------*/
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void float_raise( int8 );
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/*----------------------------------------------------------------------------
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| Software IEC/IEEE integer-to-floating-point conversion routines.
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*----------------------------------------------------------------------------*/
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float32 int32_to_float32( int32 );
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float64 int32_to_float64( int32 );
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#ifdef FLOATX80
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floatx80 int32_to_floatx80( int32 );
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#endif
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#ifdef FLOAT128
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float128 int32_to_float128( int32 );
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#endif
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float32 int64_to_float32( int64 );
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float64 int64_to_float64( int64 );
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#ifdef FLOATX80
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floatx80 int64_to_floatx80( int64 );
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#endif
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#ifdef FLOAT128
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float128 int64_to_float128( int64 );
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#endif
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/*----------------------------------------------------------------------------
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| Software IEC/IEEE single-precision conversion routines.
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*----------------------------------------------------------------------------*/
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int32 float32_to_int32( float32 );
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int32 float32_to_int32_round_to_zero( float32 );
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int64 float32_to_int64( float32 );
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int64 float32_to_int64_round_to_zero( float32 );
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float64 float32_to_float64( float32 );
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#ifdef FLOATX80
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floatx80 float32_to_floatx80( float32 );
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#endif
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#ifdef FLOAT128
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float128 float32_to_float128( float32 );
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#endif
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/*----------------------------------------------------------------------------
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| Software IEC/IEEE single-precision operations.
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*----------------------------------------------------------------------------*/
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float32 float32_round_to_int( float32 );
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float32 float32_add( float32, float32 );
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float32 float32_sub( float32, float32 );
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float32 float32_mul( float32, float32 );
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float32 float32_div( float32, float32 );
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float32 float32_rem( float32, float32 );
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float32 float32_sqrt( float32 );
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flag float32_eq( float32, float32 );
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flag float32_le( float32, float32 );
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flag float32_lt( float32, float32 );
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flag float32_eq_signaling( float32, float32 );
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flag float32_le_quiet( float32, float32 );
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flag float32_lt_quiet( float32, float32 );
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flag float32_is_signaling_nan( float32 );
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/*----------------------------------------------------------------------------
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| Software IEC/IEEE double-precision conversion routines.
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*----------------------------------------------------------------------------*/
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int32 float64_to_int32( float64 );
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int32 float64_to_int32_round_to_zero( float64 );
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int64 float64_to_int64( float64 );
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int64 float64_to_int64_round_to_zero( float64 );
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float32 float64_to_float32( float64 );
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#ifdef FLOATX80
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floatx80 float64_to_floatx80( float64 );
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#endif
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#ifdef FLOAT128
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float128 float64_to_float128( float64 );
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#endif
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/*----------------------------------------------------------------------------
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| Software IEC/IEEE double-precision operations.
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*----------------------------------------------------------------------------*/
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float64 float64_round_to_int( float64 );
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float64 float64_add( float64, float64 );
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float64 float64_sub( float64, float64 );
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float64 float64_mul( float64, float64 );
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float64 float64_div( float64, float64 );
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float64 float64_rem( float64, float64 );
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float64 float64_sqrt( float64 );
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flag float64_eq( float64, float64 );
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flag float64_le( float64, float64 );
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flag float64_lt( float64, float64 );
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flag float64_eq_signaling( float64, float64 );
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flag float64_le_quiet( float64, float64 );
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flag float64_lt_quiet( float64, float64 );
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flag float64_is_signaling_nan( float64 );
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#ifdef FLOATX80
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/*----------------------------------------------------------------------------
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| Software IEC/IEEE extended double-precision conversion routines.
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*----------------------------------------------------------------------------*/
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int32 floatx80_to_int32( floatx80 );
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int32 floatx80_to_int32_round_to_zero( floatx80 );
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int64 floatx80_to_int64( floatx80 );
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int64 floatx80_to_int64_round_to_zero( floatx80 );
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float32 floatx80_to_float32( floatx80 );
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float64 floatx80_to_float64( floatx80 );
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#ifdef FLOAT128
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float128 floatx80_to_float128( floatx80 );
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#endif
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floatx80 floatx80_scale(floatx80 a, floatx80 b);
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/*----------------------------------------------------------------------------
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| Packs the sign `zSign', exponent `zExp', and significand `zSig' into an
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| extended double-precision floating-point value, returning the result.
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*----------------------------------------------------------------------------*/
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static inline floatx80 packFloatx80( flag zSign, int32 zExp, bits64 zSig )
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{
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floatx80 z;
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z.low = zSig;
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z.high = ( ( (bits16) zSign )<<15 ) + zExp;
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return z;
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}
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/*----------------------------------------------------------------------------
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| Software IEC/IEEE extended double-precision rounding precision. Valid
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| values are 32, 64, and 80.
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*----------------------------------------------------------------------------*/
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extern int8 floatx80_rounding_precision;
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/*----------------------------------------------------------------------------
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| Software IEC/IEEE extended double-precision operations.
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*----------------------------------------------------------------------------*/
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floatx80 floatx80_round_to_int( floatx80 );
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floatx80 floatx80_add( floatx80, floatx80 );
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floatx80 floatx80_sub( floatx80, floatx80 );
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floatx80 floatx80_mul( floatx80, floatx80 );
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floatx80 floatx80_div( floatx80, floatx80 );
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floatx80 floatx80_rem( floatx80, floatx80 );
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floatx80 floatx80_sqrt( floatx80 );
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flag floatx80_eq( floatx80, floatx80 );
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flag floatx80_le( floatx80, floatx80 );
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flag floatx80_lt( floatx80, floatx80 );
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flag floatx80_eq_signaling( floatx80, floatx80 );
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flag floatx80_le_quiet( floatx80, floatx80 );
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flag floatx80_lt_quiet( floatx80, floatx80 );
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flag floatx80_is_signaling_nan( floatx80 );
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/* int floatx80_fsin(floatx80 &a);
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int floatx80_fcos(floatx80 &a);
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int floatx80_ftan(floatx80 &a); */
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floatx80 floatx80_flognp1(floatx80 a);
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floatx80 floatx80_flogn(floatx80 a);
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floatx80 floatx80_flog2(floatx80 a);
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floatx80 floatx80_flog10(floatx80 a);
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// roundAndPackFloatx80 used to be in softfloat-round-pack, is now in softfloat.c
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floatx80 roundAndPackFloatx80(int8 roundingPrecision, flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1);
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#endif
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#ifdef FLOAT128
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/*----------------------------------------------------------------------------
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| Software IEC/IEEE quadruple-precision conversion routines.
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*----------------------------------------------------------------------------*/
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int32 float128_to_int32( float128 );
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int32 float128_to_int32_round_to_zero( float128 );
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int64 float128_to_int64( float128 );
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int64 float128_to_int64_round_to_zero( float128 );
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float32 float128_to_float32( float128 );
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float64 float128_to_float64( float128 );
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#ifdef FLOATX80
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floatx80 float128_to_floatx80( float128 );
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#endif
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/*----------------------------------------------------------------------------
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| Software IEC/IEEE quadruple-precision operations.
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*----------------------------------------------------------------------------*/
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float128 float128_round_to_int( float128 );
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float128 float128_add( float128, float128 );
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float128 float128_sub( float128, float128 );
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float128 float128_mul( float128, float128 );
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float128 float128_div( float128, float128 );
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float128 float128_rem( float128, float128 );
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float128 float128_sqrt( float128 );
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flag float128_eq( float128, float128 );
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flag float128_le( float128, float128 );
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flag float128_lt( float128, float128 );
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flag float128_eq_signaling( float128, float128 );
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flag float128_le_quiet( float128, float128 );
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flag float128_lt_quiet( float128, float128 );
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flag float128_is_signaling_nan( float128 );
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/*----------------------------------------------------------------------------
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| Packs the sign `zSign', the exponent `zExp', and the significand formed
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| by the concatenation of `zSig0' and `zSig1' into a quadruple-precision
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| floating-point value, returning the result. After being shifted into the
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| proper positions, the three fields `zSign', `zExp', and `zSig0' are simply
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| added together to form the most significant 32 bits of the result. This
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| means that any integer portion of `zSig0' will be added into the exponent.
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| Since a properly normalized significand will have an integer portion equal
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| to 1, the `zExp' input should be 1 less than the desired result exponent
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| whenever `zSig0' and `zSig1' concatenated form a complete, normalized
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| significand.
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*----------------------------------------------------------------------------*/
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static inline float128
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packFloat128( flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 )
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{
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float128 z;
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z.low = zSig1;
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z.high = ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<48 ) + zSig0;
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return z;
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}
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/*----------------------------------------------------------------------------
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| Takes an abstract floating-point value having sign `zSign', exponent `zExp',
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| and extended significand formed by the concatenation of `zSig0', `zSig1',
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| and `zSig2', and returns the proper quadruple-precision floating-point value
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| corresponding to the abstract input. Ordinarily, the abstract value is
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| simply rounded and packed into the quadruple-precision format, with the
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| inexact exception raised if the abstract input cannot be represented
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| exactly. However, if the abstract value is too large, the overflow and
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| inexact exceptions are raised and an infinity or maximal finite value is
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| returned. If the abstract value is too small, the input value is rounded to
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| a subnormal number, and the underflow and inexact exceptions are raised if
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| the abstract input cannot be represented exactly as a subnormal quadruple-
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| precision floating-point number.
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| The input significand must be normalized or smaller. If the input
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| significand is not normalized, `zExp' must be 0; in that case, the result
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| returned is a subnormal number, and it must not require rounding. In the
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| usual case that the input significand is normalized, `zExp' must be 1 less
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| than the ``true'' floating-point exponent. The handling of underflow and
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| overflow follows the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
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*----------------------------------------------------------------------------*/
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static inline float128
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roundAndPackFloat128(
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flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1, bits64 zSig2 )
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{
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int8 roundingMode;
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flag roundNearestEven, increment, isTiny;
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roundingMode = float_rounding_mode;
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roundNearestEven = ( roundingMode == float_round_nearest_even );
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increment = ( (sbits64) zSig2 < 0 );
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if ( ! roundNearestEven ) {
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if ( roundingMode == float_round_to_zero ) {
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increment = 0;
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}
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else {
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if ( zSign ) {
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increment = ( roundingMode == float_round_down ) && zSig2;
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}
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else {
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increment = ( roundingMode == float_round_up ) && zSig2;
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}
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}
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}
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if ( 0x7FFD <= (bits32) zExp ) {
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if ( ( 0x7FFD < zExp )
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|| ( ( zExp == 0x7FFD )
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&& eq128(
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LIT64( 0x0001FFFFFFFFFFFF ),
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LIT64( 0xFFFFFFFFFFFFFFFF ),
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zSig0,
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zSig1
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)
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&& increment
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)
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) {
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float_raise( float_flag_overflow | float_flag_inexact );
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if ( ( roundingMode == float_round_to_zero )
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|| ( zSign && ( roundingMode == float_round_up ) )
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|| ( ! zSign && ( roundingMode == float_round_down ) )
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) {
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return
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packFloat128(
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zSign,
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0x7FFE,
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LIT64( 0x0000FFFFFFFFFFFF ),
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LIT64( 0xFFFFFFFFFFFFFFFF )
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);
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}
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return packFloat128( zSign, 0x7FFF, 0, 0 );
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}
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if ( zExp < 0 ) {
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isTiny =
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( float_detect_tininess == float_tininess_before_rounding )
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|| ( zExp < -1 )
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|| ! increment
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|| lt128(
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zSig0,
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zSig1,
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LIT64( 0x0001FFFFFFFFFFFF ),
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LIT64( 0xFFFFFFFFFFFFFFFF )
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);
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shift128ExtraRightJamming(
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zSig0, zSig1, zSig2, - zExp, &zSig0, &zSig1, &zSig2 );
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zExp = 0;
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if ( isTiny && zSig2 ) float_raise( float_flag_underflow );
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if ( roundNearestEven ) {
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increment = ( (sbits64) zSig2 < 0 );
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}
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else {
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if ( zSign ) {
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increment = ( roundingMode == float_round_down ) && zSig2;
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}
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else {
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increment = ( roundingMode == float_round_up ) && zSig2;
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}
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}
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}
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}
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if ( zSig2 ) float_exception_flags |= float_flag_inexact;
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if ( increment ) {
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add128( zSig0, zSig1, 0, 1, &zSig0, &zSig1 );
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zSig1 &= ~ ( ( zSig2 + zSig2 == 0 ) & roundNearestEven );
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}
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else {
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if ( ( zSig0 | zSig1 ) == 0 ) zExp = 0;
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}
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return packFloat128( zSign, zExp, zSig0, zSig1 );
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}
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|
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/*----------------------------------------------------------------------------
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| Takes an abstract floating-point value having sign `zSign', exponent `zExp',
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| and significand formed by the concatenation of `zSig0' and `zSig1', and
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| returns the proper quadruple-precision floating-point value corresponding
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| to the abstract input. This routine is just like `roundAndPackFloat128'
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| except that the input significand has fewer bits and does not have to be
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| normalized. In all cases, `zExp' must be 1 less than the ``true'' floating-
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| point exponent.
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*----------------------------------------------------------------------------*/
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static inline float128
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normalizeRoundAndPackFloat128(
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flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 )
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{
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int8 shiftCount;
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bits64 zSig2;
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if ( zSig0 == 0 ) {
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zSig0 = zSig1;
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zSig1 = 0;
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zExp -= 64;
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}
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shiftCount = countLeadingZeros64( zSig0 ) - 15;
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if ( 0 <= shiftCount ) {
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zSig2 = 0;
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shortShift128Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 );
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}
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else {
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shift128ExtraRightJamming(
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zSig0, zSig1, 0, - shiftCount, &zSig0, &zSig1, &zSig2 );
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}
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zExp -= shiftCount;
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return roundAndPackFloat128( zSign, zExp, zSig0, zSig1, zSig2 );
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}
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#endif
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