70 lines
1.9 KiB
Groff
70 lines
1.9 KiB
Groff
.\" $Id$
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.TH 6500_AS 6 "$Revision$"
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.ad
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.SH NAME
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6500_as \- assembler for Mostek 6500
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.SH SYNOPSIS
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~em/lib.bin/6500/as [options] argument ...
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.SH DESCRIPTION
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This assembler is made with the general framework
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described in \fIuni_ass\fP(6). It is an assembler-loader.
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Output is in \fIack.out\fP(5) object format, but not relocatable.
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.SH "SECTIONS and TYPES"
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An additional section, the \fIzeropage\fP, can be started by the
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\&\fI.sect .zero\fP pseudo-instruction.
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Some adressing-modes require an address between 0 and 255.
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Such an address must be defined with the means of the \fI.sect .zero\fP
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pseudo-instruction.
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A plain number between 0 and 255 is not allowed.
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The assembler will complain that it must be a zero page expression.
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.IP example
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\&.sect .zero
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.br
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answer: .space 1
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.br
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\&.sect .text
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.br
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and (answer, x)
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.SH SYNTAX
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.IP expressions
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An two-byte expression followed by the pseudo-operator \fI.h\fP (\fI.l\fP)
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has the value of the higher (lower) byte of the expression.
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\&\fI.h\fP and \fI.l\fP bind stronger than all other operators.
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E.g. -1.h parses as -[1.h] which has value 0.
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You have to write [-1].h to get 0xFF.
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.IP "addressing modes"
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.nf
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.ta 16n 24n 32n 40n 48n
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syntax meaning (name)
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#expr 8-bit value (immediate)
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expr address (direct)
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expr, x expr + contents of x
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or or
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expr, y expr + contents of y
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yields address (indexed)
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(expr) address of address (only with JMP) (indirect)
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.fi
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In the next two addressing modes \fIexpr\fP has to be
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a zeropage expression.
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.nf
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(expr, x) expr + contents of x
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yields address (pre-indexed indirect)
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(expr), y contents of expr + contents of y
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yields address (post-indexed indirect)
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.fi
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.IP instructions
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There are two mnemonics that do not map onto one machine-instruction:
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\fIadd\fP and \fIsub\fP. \fIAdd mode\fP maps onto \fIclc; adc mode\fP.
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\fISub mode\fP maps onto \fIsec; sbc mode\fP.
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.SH "SEE ALSO"
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uni_ass(6),
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ack(1),
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ack.out(5),
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