bd28bddb92
realised that the existing approach wasn't working. Now, hopefully, tracks the instruction trees generated during selection properly.
260 lines
3.7 KiB
Plaintext
260 lines
3.7 KiB
Plaintext
REGISTERS
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r0 any int ret;
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r1 any int;
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r2 any int;
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r3 any int;
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r4 any int;
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r5 any int;
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r6 any int;
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r7 any int;
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r8 any int;
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r9 any int;
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r10 any int;
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r11 any int;
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s0 any float;
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s1 any float;
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s2 any float;
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s3 any float;
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s4 any float;
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s5 any float;
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s6 any float;
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s7 any float;
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s8 any float;
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s9 any float;
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cc cc;
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DECLARATIONS
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reg;
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cc;
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address fragment;
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aluparam fragment;
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PATTERNS
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/* Special */
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reg;
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PAIR(BLOCK4, BLOCK4);
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/* Miscellaneous special things */
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PUSH4(in:reg)
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emit "push %in"
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cost 4;
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reg = POP4
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with int reg
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emit "pop %reg"
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cost 4;
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RET
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emit "ret"
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cost 4;
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SETRET4(in:reg)
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with ret reg
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cost 4;
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STACKADJUST4(delta:aluparam)
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emit "add sp, sp, %delta"
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cost 4;
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reg = in:REG
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emit "mov %reg, %in"
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cost 1;
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reg = NOP(in:reg)
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emit "mov %reg, %in"
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cost 1;
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/* Memory operations */
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STORE4(addr:address, value:reg)
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with int value
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emit "str %value, %addr"
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cost 4;
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STORE1(addr:address, value:reg)
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with int value
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emit "strb %value, %addr"
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cost 4;
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reg = LOAD4(addr:address)
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with int reg
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emit "ldr %reg, %addr"
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cost 4;
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reg = LOAD1(addr:address)
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with int reg
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emit "ldrb %reg, %addr"
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cost 4;
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reg = CIU14(LOAD1(addr:address))
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with int reg
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emit "ldrb %reg, %addr"
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cost 4;
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reg = CII14(CIU41(CIU14(LOAD1(addr:address))))
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with int reg
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emit "ldrsb %reg, %addr"
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cost 4;
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/* Locals */
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reg = in:LOCAL4
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with int reg
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emit "add %reg, fp, #$in"
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cost 4;
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address = in:LOCAL4
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emit "[fp, #$in]";
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/* Memory addressing modes */
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address = ADD4(addr:reg, offset:CONST4)
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with int addr
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emit "[%addr, #$offset]";
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address = ADD4(addr1:reg, addr2:reg)
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with int addr1, int addr2
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emit "[%addr1, %addr2]";
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address = addr:reg
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with int addr
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emit "[%addr]";
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/* Branches */
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JUMP(addr:BLOCK4)
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emit "b $addr"
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cost 4;
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CJUMPEQ(value:cc, PAIR(true:BLOCK4, false:BLOCK4))
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emit "beq $true"
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emit "b $false"
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cost 8;
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CJUMPLE(value:cc, PAIR(true:BLOCK4, false:BLOCK4))
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emit "ble $true"
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emit "b $false"
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cost 8;
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CJUMPLT(value:cc, PAIR(true:BLOCK4, false:BLOCK4))
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emit "blt $true"
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emit "b $false"
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cost 8;
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CALL(dest:LABEL4)
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emit "bl $dest"
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cost 4;
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/* Comparisons */
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cc = COMPARES4(left:reg, right:aluparam)
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with cc cc
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emit "cmp %left, %right"
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cost 4;
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cc = COMPARES4(COMPARES4(left:reg, right:aluparam), CONST4)
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with cc cc
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emit "cmp %left, %right"
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cost 4;
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reg = cc
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with int reg
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emit "mov %reg, #0"
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emit "movlt %reg, #-1"
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emit "movgt %reg, #1"
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cost 12;
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/* Conversions */
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reg = CII14(CIU41(value:reg))
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with int reg
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emit "sxtb %reg, %value"
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cost 4;
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reg = CIU41(in:reg)
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with int reg
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emit "and %reg, %in, #0xff"
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cost 4;
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/* ALU operations */
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reg = ADD4(left:reg, right:aluparam)
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with int reg
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emit "add %reg, %left, %right"
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cost 4;
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reg = ADD4(left:aluparam, right:reg)
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with int reg
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emit "add %reg, %right, %left"
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cost 4;
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reg = MOD4(left:reg, right:reg)
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with int reg
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emit "udiv %reg, %left, %right"
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emit "mls %reg, %reg, %right, %left"
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cost 8;
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reg = DIV4(left:reg, right:aluparam)
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with int reg
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emit "div %reg, %left, %right"
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cost 4;
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aluparam = value:CONST4
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emit "#$value";
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aluparam = value:reg
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emit "%value";
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reg = value:aluparam
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with int reg
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emit "mov %reg, %value"
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cost 4;
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reg = value:LABEL4
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with int reg
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emit "adr %reg, $value"
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cost 4;
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reg = value:BLOCK4
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with int reg
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emit "adr %reg, $value"
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cost 4;
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reg = value:CONST4
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with int reg
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emit "ldr %reg, address-containing-$value"
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cost 8;
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reg = value:CONSTF4
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with int reg
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emit "vldr %reg, address-containing-$value"
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cost 8;
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/* FPU operations */
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reg = ADDF4(left:reg, right:reg)
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with int reg
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emit "fadds %reg, %left, %right"
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cost 4;
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