323 lines
7.8 KiB
C
323 lines
7.8 KiB
C
/*
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* (c) copyright 1987 by the Vrije Universiteit, Amsterdam, The Netherlands.
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* See the copyright notice in the ACK home directory, in the file "Copyright".
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*/
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#define RCSID5 "$Id$"
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/*
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* NS 16032 special routines
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*/
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void clrmode(void) { /* clear the current mode */
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mode_ptr->m_ndisp = 0 ;
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}
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int ind_mode(int type) {
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switch ( type ) {
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case 'b' : return 0x1C ;
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case 'w' : return 0x1D ;
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case 'd' : return 0x1E ;
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case 'q' : return 0x1F ;
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default :
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serror("illegal size indicator") ;
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return 0x1F ;
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}
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}
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void badsyntax(void) {
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serror("bad operands");
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}
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void ill_imm(void) {
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serror("immediate operand not allowed") ;
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}
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/* Create the output formats */
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void form2(int id, int sval) {
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assert ( id_t1(id)==T_INT ) ;
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emit1( id_g1(id) | 0xC | (id_op(id)<<4) | ((sval&1)<<7 ) ) ;
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emit1( (sval>>1) | (mode1.m_mode<<3) ) ;
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}
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void form3(int id) {
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assert ( id_t1(id)==T_INT ) ;
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emit1( id_g1(id) | 0x7C | ((id_op(id)&1)<<7) ) ;
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emit1( (id_op(id)>>1) | (mode1.m_mode<<3) ) ;
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}
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void form4(int id) {
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assert ( id_t1(id)==T_INT && id_t2(id)==T_INT );
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emit1( id_g2(id) | (id_op(id)<<2) | ((mode2.m_mode&3)<<6) ) ;
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emit1( (mode2.m_mode>>2) | (mode1.m_mode<<3) ) ;
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}
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void form5(int id, int sval) {
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assert ( id_t1(id)==T_INT ) ;
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emit1(0xE) ;
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emit1( id_g1(id) | (id_op(id)<<2) | ((sval&1)<<7 ) ) ;
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emit1( (sval>>1) ) ;
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}
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void form7x(int id,int i_type) {
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assert ( id_t1(id)==T_INT && id_t2(id)==T_INT );
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emit1(0xCE) ;
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emit1( i_type | (id_op(id)<<2) | ((mode2.m_mode&3)<<6) ) ;
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emit1( (mode2.m_mode>>2) | (mode1.m_mode<<3) ) ;
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}
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void form8(int id,int reg) {
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assert ( id_t1(id)==T_INT ) ;
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emit1( 0x2E | ((id_op(id)&3)<<6) ) ;
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emit1( id_g1(id) | (id_op(id)&04) | (reg<<3) | ((mode2.m_mode&03)<<6) ) ;
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emit1( (mode2.m_mode>>2) | (mode1.m_mode<<3) ) ;
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}
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void form9(int id,int i_type,int f_type) {
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emit1(0x3E) ;
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emit1( i_type | (f_type<<2) | (id_op(id)<<3) | ((mode2.m_mode&03)<<6) ) ;
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emit1( (mode2.m_mode>>2) | (mode1.m_mode<<3) ) ;
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}
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void form11(int id) {
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assert ( id_t1(id)==T_FL && id_t2(id)==T_FL && id_g1(id)==id_g2(id) );
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emit1(0xBE) ;
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emit1( id_g1(id) | (id_op(id)<<2) | ((mode2.m_mode&3)<<6) ) ;
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emit1( (mode2.m_mode>>2) | (mode1.m_mode<<3) ) ;
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}
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void form14(int id,int reg) {
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assert ( id_t1(id)==T_INT ) ;
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emit1(0x1E) ;
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emit1( id_g1(id) | (id_op(id)<<2) | ((reg&1)<<7 ) ) ;
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emit1( (reg>>1) | (mode1.m_mode<<3) ) ;
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}
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void frm15_0(int id,int reg) {
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assert ( id_t1(id)==T_INT ) ;
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emit1(0x16 /* + slave<<5 */ ) ;
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emit1( id_g1(id) | (id_op(id)<<2) | ((reg&1)<<7 ) ) ;
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emit1( (reg>>1) | (mode1.m_mode<<3) ) ;
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}
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void frm15_1(int id,int i_type,int s_type) {
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emit1(0x16 /* + slave<<5 */ ) ;
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emit1( i_type | (s_type<<2) | (id_op(id)<<3) | ((mode2.m_mode&03)<<6) ) ;
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emit1( (mode2.m_mode>>2) | (mode1.m_mode<<3) ) ;
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}
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void frm15_5(int id) {
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assert(id_t1(id)==T_SLAVE&& id_t2(id)==T_SLAVE&& id_g1(id)==id_g2(id) );
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emit1(0x16 /* + slave<<5 */ ) ;
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emit1( id_g1(id) | (id_op(id)<<2) | ((mode2.m_mode&3)<<6) ) ;
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emit1( (mode2.m_mode>>2) | (mode1.m_mode<<3) ) ;
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}
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void gen1(int id) {
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if ( (mode1.m_mode&0x1C)==0x1C ) {
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emit1(mode1.m_index) ;
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}
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if ( mode1.m_mode==0x14 ) { /* Immediate */
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RELOMOVE(relonami, mode1.m_rel1);
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imm(id_g1(id),&mode1.m_expr1) ;
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} else
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if ( mode1.m_ndisp >0 ) {
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RELOMOVE(relonami, mode1.m_rel1);
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disp(&mode1.m_expr1, mode1.m_mode == 0x1B ? RELPC : 0) ;
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if ( mode1.m_ndisp >1 ) {
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RELOMOVE(relonami, mode1.m_rel2);
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disp(&mode1.m_expr2, 0) ;
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}
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}
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}
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void gengen(int id) {
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if ( (mode1.m_mode&0x1C)==0x1C ) {
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emit1(mode1.m_index) ;
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}
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if ( (mode2.m_mode&0x1C)==0x1C ) {
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emit1(mode2.m_index) ;
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}
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if ( mode1.m_mode==0x14 ) { /* Immediate */
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RELOMOVE(relonami, mode1.m_rel1);
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imm(id_g1(id),&mode1.m_expr1) ;
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} else
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if ( mode1.m_ndisp >0 ) {
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RELOMOVE(relonami, mode1.m_rel1);
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disp(&mode1.m_expr1, mode1.m_mode == 0x1B ? RELPC : 0) ;
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if ( mode1.m_ndisp >1 ) {
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RELOMOVE(relonami, mode1.m_rel2);
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disp(&mode1.m_expr2, 0) ;
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}
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}
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if ( mode2.m_mode==0x14 ) { /* Immediate */
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RELOMOVE(relonami, mode2.m_rel1);
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imm(id_g2(id),&mode2.m_expr1) ;
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} else
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if ( mode2.m_ndisp >0 ) {
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RELOMOVE(relonami, mode2.m_rel1);
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disp(&mode2.m_expr1, mode2.m_mode == 0x1B ? RELPC : 0) ;
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if ( mode2.m_ndisp >1 ) {
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RELOMOVE(relonami, mode2.m_rel2);
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disp(&mode2.m_expr2, 0) ;
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}
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}
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}
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void disp(register expr_t *expr, int relpc) {
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register int sm1, sm2 ;
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sm1=0 ; sm2=0 ;
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if (DOTTYP >= 0x2 && DOTTYP<=0x7F &&
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#ifdef ASLD
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(pass==PASS_1 ? expr->typ==S_ABS : expr->typ!=S_VAR ) ) {
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#else
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expr->typ == S_ABS) {
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#endif
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/* All non-text displacements are quad-sized.
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The algorithm currently used for minimizing the size
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(See CACM article) might generate assertion failures if
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any displacement it is trying to minimize increases during
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the assembly process. The only way to avoid increases
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like that is to fix the sizes of all displacements in
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non-text segments.
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If the framework included enough information one
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might detect in the first pass (0) whether the value
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of the expression depends on any symbols whose value
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might alter later on in the assembly process. In that case
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one could determine the right size in the first pass in
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most cases.
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*/
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if ( fitd_b(expr->val) ) {
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sm1=1 ; sm2= 1 ;
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} else {
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if ( fitd_w(expr->val) ) sm2=1 ;
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}
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}
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sm1=small(sm1,1) ; sm2=small(sm2,2) ;
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#ifdef RELOCATION
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newrelo(expr->typ, RELO4|RELBR|RELWR|relpc);
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#endif
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if ( sm1 ) putdisp(expr->val,1) ;
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else if ( sm2 ) putdisp(expr->val,2) ;
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else putdisp(expr->val,4) ;
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}
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void putdisp(valu_t val,int size)
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{
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switch ( size ) {
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case 1 :
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emit1( ((int)val)&0x7F ) ;
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break ;
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case 2 :
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emit1( ( (((int)val)>>8)&0x3F ) | 0x80 ) ;
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emit1( ((int)val)&0xFF ) ;
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break ;
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case 4 :
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emit1( (((int)(val>>24)) | 0xC0) & 0xFF ) ;
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emit1( ((int)(val>>16)) & 0xFF ) ;
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emit1( (((int)val)>>8) & 0xFF ) ;
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emit1( ((int)val)&0xFF ) ;
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break ;
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}
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}
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void dot_adjust(register expr_t *expr)
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{
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expr->val -= DOTVAL ;
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if ( pass==PASS_2 ) {
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if ( (expr->typ&S_DOT) == 0 && expr->val>0 ) {
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expr->val -= DOTGAIN;
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}
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}
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if ( (expr->typ & ~S_DOT) == DOTTYP ) {
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expr->typ=S_ABS ;
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} else {
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expr->typ=S_VAR ;
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}
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}
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/* The idea of the following is:
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* Give the assembler programmer a warning if he tries to store
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* an immediate value in a field which is too small to fit in.
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*/
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int testsize(int type,int val)
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{
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/* check if value fits in type */
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switch( type ) {
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case I_DOUBLE : return fit32(val);
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case I_WORD : return fit16(val);
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case I_BYTE : return fit8(val);
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}
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}
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void imm(int i_type,register expr_t *expr)
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{
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/* emit value of immediate expression , after check on FIT */
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if (!testsize(i_type,(int)expr->val))
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warning("immediate operand too large");
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switch( i_type ) {
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case I_DOUBLE :
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#ifdef RELOCATION
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newrelo(expr->typ, RELO4|RELBR|RELWR);
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#endif
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emit1( ((int)(expr->val>>24)) & 0xFF ) ;
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emit1( ((int)(expr->val>>16)) & 0xFF ) ;
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emit1( (((int)expr->val)>>8) & 0xFF ) ;
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emit1( ((int)expr->val) & 0xFF ) ;
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break;
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case I_WORD:
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#ifdef RELOCATION
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newrelo(expr->typ, RELO2|RELBR);
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#endif
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emit1( (((int)expr->val)>>8) & 0xFF ) ;
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emit1( ((int)expr->val) & 0xFF ) ;
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break;
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case I_BYTE:
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#ifdef RELOCATION
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newrelo(expr->typ, RELO1);
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#endif
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emit1( ((int)expr->val) & 0xFF ) ;
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}
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}
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int reg_list(int list,int reverse)
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{
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register int rev_list, i ;
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if ( !reverse ) {
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return list ;
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}
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rev_list= 0 ;
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for ( i=0 ; i<8 ; i++ ) {
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if ( list & (1<<i) ) {
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rev_list |= 1<<(7-i) ;
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}
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}
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return rev_list ;
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}
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int cpu_opt(int indic)
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{
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switch( indic ) {
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case 'i' : return 1 ;
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case 'f' : return 2 ;
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case 'm' : return 4 ;
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case 'c' : return 8 ;
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default :
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serror("illegal cpu option %c",indic) ;
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return 0 ;
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}
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}
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int string_opt(int indic) {
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switch( indic ) {
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case 'b' : return SO_BACKW ;
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case 'u' : return SO_UNTIL ;
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case 'w' : return SO_WHILE ;
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default :
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serror("illegal string option %c",indic) ;
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return 0 ;
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}
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}
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