142 lines
3.2 KiB
ArmAsm
142 lines
3.2 KiB
ArmAsm
.define .dvu4
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.sect .text
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.sect .rom
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.sect .data
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.sect .bss
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.sect .text
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! 4-byte divide routine for z80
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! parameters:
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! stack: divisor
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! dividend
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! stack: quotient (out)
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! bc de: remainder (out) (high part in bc)
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! a n-byte divide may be implemented
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! using 2 (virtual) registers:
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! - a n-byte register containing
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! the divisor
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! - a 2n-byte shiftregister (VSR)
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!
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! Initially, the VSR contains the dividend
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! in its low (right) n bytes and zeroes in its
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! high n bytes. The dividend is shifted
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! left into a "window" bit by bit. After
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! each shift, the contents of the window
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! is compared with the divisor. If it is
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! higher or equal, the divisor is subtracted from
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! it and a "1" bit is inserted in the
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! VSR from the right side; else a "0" bit
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! is inserted. These bits are shifted left
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! too during subsequent iterations.
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! At the end, the rightmost part of VSR
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! contains the quotient.
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! For n=4, we need 2*4+4 = 12 bytes of
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! registers. Unfortunately we only have
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! 5 2-byte registers on the z80
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! (bc,de,hl,ix and iy). Therefore we use
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! an overlay technique for the rightmost
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! 4 bytes of the VSR. The 32 iterations
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! are split up into two groups: during
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! the first 16 iterations we use the high
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! order 16 bits of the dividend; during
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! the last 16 iterations we use the
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! low order 16 bits.
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! register allocation:
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! VSR iy hl ix
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! divisor -de bc
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.dvu4:
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! initialization
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pop hl ! save return address
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ld (.retaddr),hl
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pop bc ! low part (2 bytes)
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! of divisor in bc
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xor a ! clear carry, a := 0
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ld h,a ! hl := 0
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ld l,a
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ld (.flag),a ! first pass main loop
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pop de ! high part divisor
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sbc hl,de ! inverse of high part
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ex de,hl ! of divisor in de
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pop hl ! save low part of
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! dividend in memory
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ld (.low),hl ! used during second
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! iteration over main loop
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pop ix ! high part of dividend
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push iy ! save LB
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ld h,a ! hl := 0
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ld l,a
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ld iy,0 ! now the VSR is initialized
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! main loop, done twice
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1:
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ld a,16
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! sub-loop, done 16 times
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2:
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add iy,iy ! shift VSR left
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add ix,ix
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adc hl,hl
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jp nc,3f
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inc iy
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3:
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or a ! subtract divisor from
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! window (iy hl)
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ld (.iysave),iy
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sbc hl,bc
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jr nc,4f ! decrement iy if there
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! was no borrow
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dec iy
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4:
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add iy,de ! there is no "sbc iy,ss"
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! on the z80, so de was
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! inverted during init.
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inc ix
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! see if the result is non-negative,
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! otherwise undo the subtract.
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! note that this uncooperating machine
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! does not set its S -or Z flag after
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! a 16-bit add.
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ex (sp),iy ! does anyone see a better
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ex (sp),hl ! solution ???
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bit 7,h
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ex (sp),hl
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ex (sp),iy
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jp z,5f
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! undo the subtract
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add hl,bc
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ld iy,(.iysave)
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dec ix
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5:
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dec a
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jr nz,2b
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ld a,(.flag) ! see if this was first or
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! second iteration of main loop
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or a ! 0=first, 1=second
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jr nz,6f
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inc a ! a := 1
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ld (.flag),a ! flag := 1
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ld (.result),ix ! save high part of result
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ld ix,(.low) ! initialize second
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! iteration, ix := low
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! part of dividend
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jr 1b
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6:
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! clean up
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push iy ! transfer remainder
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pop bc ! from iy-hl to bc-de
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ex de,hl
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pop iy ! restore LB
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ld hl,(.result) ! high part of result
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push hl
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push ix ! low part of result
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ld hl,(.retaddr)
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jp (hl) ! return
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.sect .data
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.flag: .data1 0
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.low: .data2 0
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.iysave: .data2 0
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.retaddr: .data2 0
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.result: .data2 0
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