219 lines
4.8 KiB
Plaintext
219 lines
4.8 KiB
Plaintext
add dst:REG, src:EADDR ==> @text1( 0x3);
|
|
mod_RM( dst->reg, src).
|
|
|
|
... dst:ACCU, src:DATA ==> @text1( 0x5);
|
|
@text4( %$(src->expr)).
|
|
|
|
... dst:EADDR, src:DATA ==> small_RMconst(0x81, 0, dst, src).
|
|
|
|
and dst:REG, src:EADDR ==> @text1( 0x23);
|
|
mod_RM( dst->reg, src).
|
|
|
|
... dst:ACCU, src:DATA ==> @text1( 0x25);
|
|
@text4( %$(src->expr)).
|
|
|
|
call dst:lABEL ==> @text1( 0xe8);
|
|
@reloc4( %$(dst->lab), %$(dst->off), PC_REL).
|
|
|
|
... dst:EADDR ==> @text1( 0xff);
|
|
mod_RM( 2, dst).
|
|
|
|
cdq ==> @text1(0x99).
|
|
|
|
cmp dst:REG, src:EADDR ==> @text1( 0x3b);
|
|
mod_RM( dst->reg, src).
|
|
|
|
... dst:ACCU, src:DATA ==> @text1( 0x3d);
|
|
@text4( %$(src->expr)).
|
|
|
|
... dst:EADDR, src:DATA ==> small_RMconst(0x81, 7, dst, src).
|
|
|
|
dec dst:REG ==> R53( 9, dst->reg).
|
|
|
|
... dst:EADDR ==> @text1( 0xff);
|
|
mod_RM( 1, dst).
|
|
|
|
div divisor:EADDR ==> @text1( 0xf7);
|
|
mod_RM( 6, divisor).
|
|
|
|
enter nm:DATA, nm1:DATA ==> @text1( 0xc8);
|
|
@text2( %$(nm->expr));
|
|
@text1( %$(nm1->expr)).
|
|
|
|
idiv divisor:EADDR ==> @text1( 0xf7);
|
|
mod_RM( 7, divisor).
|
|
|
|
imul mplier:EADDR ==> @text1( 0xf7);
|
|
mod_RM( 5, mplier).
|
|
|
|
inc dst:REG ==> R53( 8, dst->reg).
|
|
|
|
... dst:EADDR ==> @text1( 0xff);
|
|
mod_RM( 0, dst).
|
|
|
|
jb dst:ILB ==> @text1( 0x72);
|
|
@text1( %dist( dst->lab)).
|
|
|
|
... dst:lABEL ==> @text1(0x0f);
|
|
@text1(0x12);
|
|
@reloc4( %$(dst->lab), %$(dst->off), PC_REL).
|
|
|
|
je dst:ILB ==> @text1( 0x74);
|
|
@text1( %dist( dst->lab)).
|
|
|
|
... dst:lABEL ==> @text1(0x0f);
|
|
@text1(0x14);
|
|
@reloc4( %$(dst->lab), %$(dst->off), PC_REL).
|
|
|
|
jg dst:ILB ==> @text1( 0x7f);
|
|
@text1( %dist( dst->lab)).
|
|
|
|
... dst:lABEL ==> @text1(0x0f);
|
|
@text1(0x1f);
|
|
@reloc4( %$(dst->lab), %$(dst->off), PC_REL).
|
|
|
|
jge dst:ILB ==> @text1( 0x7d);
|
|
@text1( %dist( dst->lab)).
|
|
|
|
... dst:lABEL ==> @text1(0x0f);
|
|
@text1(0x1d);
|
|
@reloc4( %$(dst->lab), %$(dst->off), PC_REL).
|
|
|
|
jl dst:ILB ==> @text1( 0x7c);
|
|
@text1( %dist( dst->lab)).
|
|
|
|
... dst:lABEL ==> @text1(0x0f);
|
|
@text1(0x1c);
|
|
@reloc4( %$(dst->lab), %$(dst->off), PC_REL).
|
|
|
|
jle dst:ILB ==> @text1( 0x7e);
|
|
@text1( %dist( dst->lab)).
|
|
|
|
... dst:lABEL ==> @text1(0x0f);
|
|
@text1(0x1e);
|
|
@reloc4( %$(dst->lab), %$(dst->off), PC_REL).
|
|
|
|
jmp dst:ILB ==> @text1( 0xeb);
|
|
@text1( %dist( dst->lab)).
|
|
|
|
... dst:lABEL ==> @text1( 0xe9);
|
|
@reloc4( %$(dst->lab), %$(dst->off), PC_REL).
|
|
|
|
jne dst:ILB ==> @text1( 0x75);
|
|
@text1( %dist( dst->lab)).
|
|
|
|
... dst:lABEL ==> @text1(0x0f);
|
|
@text1(0x85);
|
|
@reloc4( %$(dst->lab), %$(dst->off), PC_REL).
|
|
|
|
lea dst:REG, src:EADDR ==> @text1( 0x8d);
|
|
mod_RM( dst->reg, src).
|
|
|
|
loop dst:ILB ==> @text1( 0xe2);
|
|
@text1( %dist( dst->lab)).
|
|
|
|
mov dst:REG, src:EADDR ==> mv_RG_EADDR( dst, src).
|
|
|
|
... dst:REG, src:DATA ==> R53( 0x17, dst->reg);
|
|
@text4(%$(src->expr)).
|
|
|
|
... dst:EADDR, src:REG ==> @text1( 0x89);
|
|
mod_RM( src->reg, dst).
|
|
|
|
... dst:EADDR, src:DATA ==> @text1( 0xc7);
|
|
mod_RM( 0, dst);
|
|
@text4( %$(src->expr)).
|
|
|
|
... dst:EADDR, src:lABEL ==> @text1( 0xc7);
|
|
mod_RM( 0, dst);
|
|
@reloc4( %$(src->lab), %$(src->off), ABSOLUTE).
|
|
|
|
movb dst:EADDR, src:REG ==> @text1( 0x88);
|
|
mod_RM( src->reg, dst).
|
|
|
|
movzx dst:REG, src:EADDR ==> @text1(0x0f);
|
|
@text1(0xb7);
|
|
mod_RM(dst->reg, src).
|
|
|
|
mul mplier:EADDR ==> @text1( 0xf7);
|
|
mod_RM( 4, mplier).
|
|
|
|
neg dst:EADDR ==> @text1( 0xf7);
|
|
mod_RM( 3, dst).
|
|
|
|
not dst:EADDR ==> @text1( 0xf7);
|
|
mod_RM( 2, dst).
|
|
|
|
o16 ==> @text1(0x66).
|
|
|
|
or dst:REG, src:EADDR ==> @text1( 0x0b);
|
|
mod_RM( dst->reg, src).
|
|
|
|
pop dst:REG ==> R53( 0xb, dst->reg).
|
|
|
|
... dst:EADDR ==> @text1( 0x8f);
|
|
mod_RM( 0, dst).
|
|
|
|
/*
|
|
POP dst ==> @if ( push_waiting)
|
|
mov_instr( dst, AX_oper);
|
|
@assign( push_waiting, FALSE).
|
|
@else
|
|
pop_instr( dst).
|
|
@fi.
|
|
*/
|
|
|
|
push src:REG ==> R53( 0xa, src->reg).
|
|
|
|
... src:DATA ==> small_const(0x68, src).
|
|
|
|
... src:lABEL ==> @emit1(0x68);
|
|
@reloc4(%$(src->lab), %$(src->off), ABSOLUTE).
|
|
|
|
... src:EADDR ==> @text1( 0xff);
|
|
mod_RM( 6, src).
|
|
|
|
/*
|
|
PUSH src ==> mov_instr( AX_oper, src);
|
|
@assign( push_waiting, TRUE).
|
|
*/
|
|
ret ==> @text1( 0xc3). /* Always NEAR! */
|
|
|
|
leave ==> @text1( 0xc9). /* Always NEAR! */
|
|
|
|
rol dst:EADDR, src:REG_CL ==> @text1( 0xd3);
|
|
mod_RM( 0, dst).
|
|
|
|
ror dst:EADDR, src:REG_CL ==> @text1( 0xd3);
|
|
mod_RM( 1, dst).
|
|
|
|
sal dst:EADDR, src:REG_CL ==> @text1( 0xd3);
|
|
mod_RM( 4, dst).
|
|
|
|
sar dst:EADDR, src:REG_CL ==> @text1( 0xd3);
|
|
mod_RM( 7, dst).
|
|
|
|
... dst:EADDR, src:DATA ==> @text1( 0xc1);
|
|
mod_RM( 7, dst);
|
|
@text1(%$(src->expr)).
|
|
|
|
shl dst:EADDR, src:REG_CL ==> @text1(0xd3);
|
|
mod_RM(4, dst).
|
|
|
|
shr dst:EADDR, src:REG_CL ==> @text1( 0xd3);
|
|
mod_RM( 5, dst).
|
|
|
|
sub dst:REG, src:EADDR ==> @text1( 0x2b);
|
|
mod_RM( dst->reg, src).
|
|
|
|
... dst:EADDR, src:DATA ==> small_RMconst(0x81, 5, dst, src).
|
|
|
|
test dst:REG, src:EADDR ==> @text1( 0x85);
|
|
mod_RM( dst->reg, src).
|
|
|
|
xchg dst:EADDR, src:REG ==> @text1( 0x87);
|
|
mod_RM( src->reg, dst).
|
|
|
|
xor dst:REG, src:EADDR ==> @text1( 0x33);
|
|
mod_RM( dst->reg, src).
|