From 3de023b6c652931a73991673529252df82f58fd3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Daniel=20Gl=C3=B6ckner?= Date: Thu, 13 May 2010 22:17:09 +0200 Subject: [PATCH] ARM: use uint32_t for opcodes fixes cross compiling on x86_64 --- arm-gen.c | 85 ++++++++++++++++++++++++++++--------------------------- tcc.h | 2 +- 2 files changed, 44 insertions(+), 43 deletions(-) diff --git a/arm-gen.c b/arm-gen.c index e9bc3a02..81ee2213 100644 --- a/arm-gen.c +++ b/arm-gen.c @@ -168,7 +168,7 @@ ST_DATA const int reg_classes[NB_REGS] = { #endif }; -static unsigned long func_sub_sp_offset,last_itod_magic; +static int func_sub_sp_offset, last_itod_magic; static int leaffunc; static int two2mask(int a,int b) { @@ -181,7 +181,7 @@ static int regmask(int r) { /******************************************************/ -void o(unsigned int i) +void o(uint32_t i) { /* this is a good place to start adding big-endian support*/ int ind1; @@ -201,10 +201,10 @@ void o(unsigned int i) cur_text_section->data[ind++] = i; } -static unsigned long stuff_const(unsigned long op,unsigned long c) +static uint32_t stuff_const(uint32_t op, uint32_t c) { int try_neg=0; - unsigned long nc = 0,negop = 0; + uint32_t nc = 0, negop = 0; switch(op&0x1F00000) { @@ -238,7 +238,7 @@ static unsigned long stuff_const(unsigned long op,unsigned long c) break; } do { - unsigned long m; + uint32_t m; int i; if(c<256) /* catch undefined <<32 */ return op|c; @@ -255,13 +255,13 @@ static unsigned long stuff_const(unsigned long op,unsigned long c) //only add,sub -void stuff_const_harder(unsigned long op,unsigned long v) { - unsigned long x; +void stuff_const_harder(uint32_t op, uint32_t v) { + uint32_t x; x=stuff_const(op,v); if(x) o(x); else { - unsigned long a[16],nv,no,o2,n2; + uint32_t a[16], nv, no, o2, n2; int i,j,k; a[0]=0xff; o2=(op&0xfff0ffff)|((op&0xf000)<<4);; @@ -311,7 +311,7 @@ void stuff_const_harder(unsigned long op,unsigned long v) { } } -ST_FUNC unsigned long encbranch(int pos,int addr,int fail) +ST_FUNC uint32_t encbranch(int pos, int addr, int fail) { addr-=pos+8; addr/=4; @@ -326,7 +326,7 @@ ST_FUNC unsigned long encbranch(int pos,int addr,int fail) int decbranch(int pos) { int x; - x=*(int *)(cur_text_section->data + pos); + x=*(uint32_t *)(cur_text_section->data + pos); x&=0x00ffffff; if(x&0x800000) x-=0x1000000; @@ -336,10 +336,10 @@ int decbranch(int pos) /* output a symbol and patch all calls to it */ void gsym_addr(int t, int a) { - unsigned long *x; + uint32_t *x; int lt; while(t) { - x=(unsigned long *)(cur_text_section->data + t); + x=(uint32_t *)(cur_text_section->data + t); t=decbranch(lt=t); if(a==lt+4) *x=0xE1A00000; // nop @@ -356,14 +356,14 @@ void gsym(int t) } #ifdef TCC_ARM_VFP -static unsigned long vfpr(int r) +static uint32_t vfpr(int r) { if(rTREG_F7) error("compiler error! register %i is no vfp register",r); return r-5; } #else -static unsigned long fpr(int r) +static uint32_t fpr(int r) { if(rTREG_F3) error("compiler error! register %i is no fpa register",r); @@ -371,7 +371,7 @@ static unsigned long fpr(int r) } #endif -static unsigned long intr(int r) +static uint32_t intr(int r) { if(r==4) return 12; @@ -380,10 +380,10 @@ static unsigned long intr(int r) return r; } -static void calcaddr(unsigned long *base,int *off,int *sgn,int maxoff,unsigned shift) +static void calcaddr(uint32_t *base, int *off, int *sgn, int maxoff, unsigned shift) { if(*off>maxoff || *off&((1<r; @@ -493,7 +493,7 @@ void load(int r, SValue *sv) v = fr & VT_VALMASK; if (fr & VT_LVAL) { - unsigned long base=0xB; // fp + uint32_t base = 0xB; // fp if(v == VT_LLOCAL) { v1.type.t = VT_PTR; v1.r = VT_LOCAL | VT_LVAL; @@ -617,7 +617,7 @@ void store(int r, SValue *sv) { SValue v1; int v, ft, fc, fr, sign; - unsigned long op; + uint32_t op; fr = sv->r; ft = sv->type.t; @@ -632,7 +632,7 @@ void store(int r, SValue *sv) v = fr & VT_VALMASK; if (fr & VT_LVAL || fr == VT_LOCAL) { - unsigned long base=0xb; + uint32_t base = 0xb; if(v < VT_CONST) { base=intr(v); v=VT_LOCAL; @@ -703,7 +703,7 @@ static void gcall_or_jmp(int is_jmp) { int r; if ((vtop->r & (VT_VALMASK | VT_LVAL)) == VT_CONST) { - unsigned long x; + uint32_t x; /* constant case */ x=encbranch(ind,ind+vtop->c.ul,0); if(x) { @@ -987,7 +987,7 @@ void gfunc_prolog(CType *func_type) /* generate function epilog */ void gfunc_epilog(void) { - unsigned long x; + uint32_t x; int diff; #ifdef TCC_ARM_EABI if(is_float(func_vt.t)) { @@ -1008,15 +1008,15 @@ void gfunc_epilog(void) if(diff > 12) { x=stuff_const(0xE24BD000, diff); /* sub sp,fp,# */ if(x) - *(unsigned long *)(cur_text_section->data + func_sub_sp_offset) = x; + *(uint32_t *)(cur_text_section->data + func_sub_sp_offset) = x; else { - unsigned long addr; + int addr; addr=ind; o(0xE59FC004); /* ldr ip,[pc+4] */ o(0xE04BD00C); /* sub sp,fp,ip */ o(0xE1A0F00E); /* mov pc,lr */ o(diff); - *(unsigned long *)(cur_text_section->data + func_sub_sp_offset) = 0xE1000000|encbranch(func_sub_sp_offset,addr,1); + *(uint32_t *)(cur_text_section->data + func_sub_sp_offset) = 0xE1000000|encbranch(func_sub_sp_offset,addr,1); } } } @@ -1040,7 +1040,7 @@ void gjmp_addr(int a) int gtst(int inv, int t) { int v, r; - unsigned long op; + uint32_t op; v = vtop->r & VT_VALMASK; r=ind; if (v == VT_CMP) { @@ -1053,14 +1053,14 @@ int gtst(int inv, int t) if(!vtop->c.i) vtop->c.i=t; else { - unsigned long *x; + uint32_t *x; int p,lp; if(t) { p = vtop->c.i; do { p = decbranch(lp=p); } while(p); - x = (unsigned long *)(cur_text_section->data + lp); + x = (uint32_t *)(cur_text_section->data + lp); *x &= 0xff000000; *x |= encbranch(lp,t,1); } @@ -1102,7 +1102,7 @@ int gtst(int inv, int t) void gen_opi(int op) { int c, func = 0; - unsigned long opc = 0,r,fr; + uint32_t opc = 0, r, fr; unsigned short retreg = REG_IRET; c=0; @@ -1218,7 +1218,7 @@ void gen_opi(int op) vswap(); opc=0xE0000000|(opc<<20)|(c<<16); if((vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST) { - unsigned long x; + uint32_t x; x=stuff_const(opc|0x2000000,vtop->c.i); if(x) { r=intr(vtop[-1].r=get_reg_ex(RC_INT,regmask(vtop[-1].r))); @@ -1284,7 +1284,7 @@ static int is_zero(int i) * two operands are guaranted to have the same floating point type */ void gen_opf(int op) { - unsigned long x; + uint32_t x; int fneg=0,r; x=0xEE000A00|T2CPR(vtop->type.t); switch(op) { @@ -1372,10 +1372,10 @@ void gen_opf(int op) } #else -static int is_fconst() +static uint32_t is_fconst() { long double f; - int r; + uint32_t r; if((vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) != VT_CONST) return 0; if (vtop->type.t == VT_FLOAT) @@ -1414,8 +1414,7 @@ static int is_fconst() two operands are guaranted to have the same floating point type */ void gen_opf(int op) { - unsigned long x; - int r,r2,c1,c2; + uint32_t x, r, r2, c1, c2; //fputs("gen_opf\n",stderr); vswap(); c1 = is_fconst(); @@ -1580,11 +1579,12 @@ void gen_opf(int op) and 'long long' cases. */ ST_FUNC void gen_cvt_itof1(int t) { - int r,r2,bt; + uint32_t r, r2; + int bt; bt=vtop->type.t & VT_BTYPE; if(bt == VT_INT || bt == VT_SHORT || bt == VT_BYTE) { #ifndef TCC_ARM_VFP - unsigned int dsize=0; + uint32_t dsize = 0; #endif r=intr(gv(RC_INT)); #ifdef TCC_ARM_VFP @@ -1600,7 +1600,7 @@ ST_FUNC void gen_cvt_itof1(int t) dsize=0x80; /* flts -> fltd */ o(0xEE000110|dsize|(r2<<16)|(r<<12)); /* flts */ if((vtop->type.t & (VT_UNSIGNED|VT_BTYPE)) == (VT_UNSIGNED|VT_INT)) { - unsigned int off=0; + uint32_t off = 0; o(0xE3500000|(r<<12)); /* cmp */ r=fpr(get_reg(RC_FLOAT)); if(last_itod_magic) { @@ -1660,7 +1660,8 @@ ST_FUNC void gen_cvt_itof1(int t) /* convert fp to int 't' type */ void gen_cvt_ftoi(int t) { - int r,r2,u,func=0; + uint32_t r, r2; + int u, func = 0; u=t&VT_UNSIGNED; t&=VT_BTYPE; r2=vtop->type.t & VT_BTYPE; @@ -1721,7 +1722,7 @@ void gen_cvt_ftof(int t) { #ifdef TCC_ARM_VFP if(((vtop->type.t & VT_BTYPE) == VT_FLOAT) != ((t & VT_BTYPE) == VT_FLOAT)) { - int r=vfpr(gv(RC_FLOAT)); + uint32_t r = vfpr(gv(RC_FLOAT)); o(0xEEB70AC0|(r<<12)|r|T2CPR(vtop->type.t)); } #else diff --git a/tcc.h b/tcc.h index 7571f3e0..313214ca 100644 --- a/tcc.h +++ b/tcc.h @@ -1161,7 +1161,7 @@ ST_FUNC void gen_addr64(int r, Sym *sym, int64_t c); /* ------------ arm-gen.c ------------ */ #ifdef TCC_TARGET_ARM -ST_FUNC unsigned long encbranch(int pos,int addr,int fail); +ST_FUNC uint32_t encbranch(int pos, int addr, int fail); ST_FUNC void gen_cvt_itof1(int t); #endif