From 69c77d1597eed5df46a683c93ee7dd83e770aa48 Mon Sep 17 00:00:00 2001
From: Michael Matz <matz@suse.de>
Date: Mon, 22 Jul 2019 01:27:08 +0200
Subject: [PATCH] riscv: Fix unsigned 32bit loads

the invariant for the risc-v codegen is, that 64bit regs
generally contain the sign-extension of a 32bit value.
This wasn't heeded by loads of 32bit values from memory, which
used lwu and ultimately caused a miscompilation in string_test
of tcctest.c.

Now most of tcctest.c works (not with -run, but with linking
a real executable), except some ftoi/ftof conversions.
---
 riscv64-gen.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/riscv64-gen.c b/riscv64-gen.c
index 53d1ffed..164f1670 100644
--- a/riscv64-gen.c
+++ b/riscv64-gen.c
@@ -155,7 +155,7 @@ ST_FUNC void load(int r, SValue *sv)
             if (bt == VT_FUNC)
               size = PTR_SIZE;
             func3 = size == 1 ? 0 : size == 2 ? 1 : size == 4 ? 2 : 3;
-            if (size < 8 && !is_float(sv->type.t) && (sv->type.t & VT_UNSIGNED))
+            if (size < 4 && !is_float(sv->type.t) && (sv->type.t & VT_UNSIGNED))
               func3 |= 4;
         }
         if (v == VT_LOCAL) {