2006-06-13 15:50:40 +00:00
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#include "types.h"
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#include "param.h"
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2011-07-29 11:31:27 +00:00
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#include "memlayout.h"
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2019-05-31 13:45:59 +00:00
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#include "riscv.h"
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2007-08-27 13:34:35 +00:00
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#include "spinlock.h"
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2019-07-02 13:14:47 +00:00
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#include "proc.h"
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2019-05-31 13:45:59 +00:00
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#include "defs.h"
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2006-06-13 15:50:40 +00:00
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2007-08-27 13:34:35 +00:00
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struct spinlock tickslock;
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2010-08-11 18:34:45 +00:00
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uint ticks;
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2006-06-13 15:50:40 +00:00
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2019-07-26 13:38:22 +00:00
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extern char trampoline[], uservec[], userret[];
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2019-05-31 13:45:59 +00:00
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2019-06-03 19:23:12 +00:00
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// in kernelvec.S, calls kerneltrap().
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void kernelvec();
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2019-05-31 13:45:59 +00:00
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2019-06-04 18:20:37 +00:00
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extern int devintr();
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2006-06-13 15:50:40 +00:00
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void
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2019-05-31 13:45:59 +00:00
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trapinit(void)
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2006-06-13 15:50:40 +00:00
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{
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2019-06-05 18:05:46 +00:00
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initlock(&tickslock, "time");
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}
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2006-06-13 15:50:40 +00:00
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2019-06-05 18:05:46 +00:00
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// set up to take exceptions and traps while in the kernel.
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void
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trapinithart(void)
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{
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2019-06-03 19:23:12 +00:00
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w_stvec((uint64)kernelvec);
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2006-06-26 20:31:52 +00:00
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}
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2019-05-31 13:45:59 +00:00
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//
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// handle an interrupt, exception, or system call from user space.
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// called from trampoline.S
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//
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2006-06-26 20:31:52 +00:00
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void
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2019-05-31 13:45:59 +00:00
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usertrap(void)
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2006-06-26 20:31:52 +00:00
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{
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2019-06-04 18:25:48 +00:00
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int which_dev = 0;
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2019-07-02 09:20:11 +00:00
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2019-05-31 13:45:59 +00:00
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if((r_sstatus() & SSTATUS_SPP) != 0)
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panic("usertrap: not from user mode");
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// send interrupts and exceptions to kerneltrap(),
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// since we're now in the kernel.
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2019-06-03 19:23:12 +00:00
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w_stvec((uint64)kernelvec);
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2019-05-31 13:45:59 +00:00
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struct proc *p = myproc();
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// save user program counter.
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p->tf->epc = r_sepc();
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if(r_scause() == 8){
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// system call
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2019-07-10 13:24:50 +00:00
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if(p->killed)
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exit();
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2019-05-31 13:45:59 +00:00
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// sepc points to the ecall instruction,
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// but we want to return to the next instruction.
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p->tf->epc += 4;
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Checkpoint port of xv6 to x86-64. Passed usertests on 2 processors a few times.
The x86-64 doesn't just add two levels to page tables to support 64 bit
addresses, but is a different processor. For example, calling conventions,
system calls, and segmentation are different from 32-bit x86. Segmentation is
basically gone, but gs/fs in combination with MSRs can be used to hold a
per-core pointer. In general, x86-64 is more straightforward than 32-bit
x86. The port uses code from sv6 and the xv6 "rsc-amd64" branch.
A summary of the changes is as follows:
- Booting: switch to grub instead of xv6's bootloader (pass -kernel to qemu),
because xv6's boot loader doesn't understand 64bit ELF files. And, we don't
care anymore about booting.
- Makefile: use -m64 instead of -m32 flag for gcc, delete boot loader, xv6.img,
bochs, and memfs. For now dont' use -O2, since usertests with -O2 is bigger than
MAXFILE!
- Update gdb.tmpl to be for i386 or x86-64
- Console/printf: use stdarg.h and treat 64-bit addresses different from ints
(32-bit)
- Update elfhdr to be 64 bit
- entry.S/entryother.S: add code to switch to 64-bit mode: build a simple page
table in 32-bit mode before switching to 64-bit mode, share code for entering
boot processor and APs, and tweak boot gdt. The boot gdt is the gdt that the
kernel proper also uses. (In 64-bit mode, the gdt/segmentation and task state
mostly disappear.)
- exec.c: fix passing argv (64-bit now instead of 32-bit).
- initcode.c: use syscall instead of int.
- kernel.ld: load kernel very high, in top terabyte. 64 bits is a lot of
address space!
- proc.c: initial return is through new syscall path instead of trapret.
- proc.h: update struct cpu to have some scratch space since syscall saves less
state than int, update struct context to reflect x86-64 calling conventions.
- swtch: simplify for x86-64 calling conventions.
- syscall: add fetcharg to handle x86-64 calling convetions (6 arguments are
passed through registers), and fetchaddr to read a 64-bit value from user space.
- sysfile: update to handle pointers from user space (e.g., sys_exec), which are
64 bits.
- trap.c: no special trap vector for sys calls, because x86-64 has a different
plan for system calls.
- trapasm: one plan for syscalls and one plan for traps (interrupt and
exceptions). On x86-64, the kernel is responsible for switching user/kernel
stacks. To do, xv6 keeps some scratch space in the cpu structure, and uses MSR
GS_KERN_BASE to point to the core's cpu structure (using swapgs).
- types.h: add uint64, and change pde_t to uint64
- usertests: exit() when fork fails, which helped in tracking down one of the
bugs in the switch from 32-bit to 64-bit
- vectors: update to make them 64 bits
- vm.c: use bootgdt in kernel too, program MSRs for syscalls and core-local
state (for swapgs), walk 4 levels in walkpgdir, add DEVSPACETOP, use task
segment to set kernel stack for interrupts (but simpler than in 32-bit mode),
add an extra argument to freevm (size of user part of address space) to avoid
checking all entries till KERNBASE (there are MANY TB before the top 1TB).
- x86: update trapframe to have 64-bit entries, which is what the processor
pushes on syscalls and traps. simplify lgdt and lidt, using struct desctr,
which needs the gcc directives packed and aligned.
TODO:
- use int32 instead of int?
- simplify curproc(). xv6 has per-cpu state again, but this time it must have it.
- avoid repetition in walkpgdir
- fix validateint() in usertests.c
- fix bugs (e.g., observed one a case of entering kernel with invalid gs or proc
2018-09-23 12:24:42 +00:00
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2019-07-02 09:20:11 +00:00
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// an interrupt will change sstatus &c registers,
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// so don't enable until done with those registers.
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intr_on();
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2019-05-31 13:45:59 +00:00
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syscall();
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2019-06-04 18:25:48 +00:00
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} else if((which_dev = devintr()) != 0){
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2019-06-04 18:20:37 +00:00
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// ok
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2019-05-31 13:45:59 +00:00
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} else {
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2019-07-02 09:20:11 +00:00
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printf("usertrap(): unexpected scause %p pid=%d\n", r_scause(), p->pid);
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2019-06-01 09:33:38 +00:00
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printf(" sepc=%p stval=%p\n", r_sepc(), r_stval());
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2019-06-04 15:31:50 +00:00
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p->killed = 1;
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2019-05-31 13:45:59 +00:00
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}
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2019-06-04 15:31:50 +00:00
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if(p->killed)
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exit();
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2019-06-04 18:25:48 +00:00
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// give up the CPU if this is a timer interrupt.
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if(which_dev == 2)
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yield();
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2019-05-31 13:45:59 +00:00
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usertrapret();
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2006-06-13 15:50:40 +00:00
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}
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2019-05-31 13:45:59 +00:00
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//
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// return to user space
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//
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2006-06-13 15:50:40 +00:00
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void
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2019-05-31 13:45:59 +00:00
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usertrapret(void)
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2006-06-13 15:50:40 +00:00
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{
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2019-05-31 13:45:59 +00:00
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struct proc *p = myproc();
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2019-06-03 19:23:12 +00:00
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// turn off interrupts, since we're switching
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2019-05-31 13:45:59 +00:00
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// now from kerneltrap() to usertrap().
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2019-06-03 19:23:12 +00:00
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intr_off();
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2019-05-31 13:45:59 +00:00
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// send interrupts and exceptions to trampoline.S
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2019-07-26 08:53:46 +00:00
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w_stvec(TRAMPOLINE + (uservec - trampoline));
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2019-05-31 13:45:59 +00:00
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2019-07-26 14:17:02 +00:00
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// set up values that uservec will need when
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2019-05-31 13:45:59 +00:00
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// the process next re-enters the kernel.
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2019-07-26 14:17:02 +00:00
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p->tf->kernel_satp = r_satp(); // kernel page table
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p->tf->kernel_sp = p->kstack + PGSIZE; // process's kernel stack
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2019-05-31 13:45:59 +00:00
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p->tf->kernel_trap = (uint64)usertrap;
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2019-07-26 14:17:02 +00:00
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p->tf->kernel_hartid = r_tp(); // hartid for cpuid()
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2007-09-27 19:35:25 +00:00
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2019-05-31 13:45:59 +00:00
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// set up the registers that trampoline.S's sret will use
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// to get to user space.
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Checkpoint port of xv6 to x86-64. Passed usertests on 2 processors a few times.
The x86-64 doesn't just add two levels to page tables to support 64 bit
addresses, but is a different processor. For example, calling conventions,
system calls, and segmentation are different from 32-bit x86. Segmentation is
basically gone, but gs/fs in combination with MSRs can be used to hold a
per-core pointer. In general, x86-64 is more straightforward than 32-bit
x86. The port uses code from sv6 and the xv6 "rsc-amd64" branch.
A summary of the changes is as follows:
- Booting: switch to grub instead of xv6's bootloader (pass -kernel to qemu),
because xv6's boot loader doesn't understand 64bit ELF files. And, we don't
care anymore about booting.
- Makefile: use -m64 instead of -m32 flag for gcc, delete boot loader, xv6.img,
bochs, and memfs. For now dont' use -O2, since usertests with -O2 is bigger than
MAXFILE!
- Update gdb.tmpl to be for i386 or x86-64
- Console/printf: use stdarg.h and treat 64-bit addresses different from ints
(32-bit)
- Update elfhdr to be 64 bit
- entry.S/entryother.S: add code to switch to 64-bit mode: build a simple page
table in 32-bit mode before switching to 64-bit mode, share code for entering
boot processor and APs, and tweak boot gdt. The boot gdt is the gdt that the
kernel proper also uses. (In 64-bit mode, the gdt/segmentation and task state
mostly disappear.)
- exec.c: fix passing argv (64-bit now instead of 32-bit).
- initcode.c: use syscall instead of int.
- kernel.ld: load kernel very high, in top terabyte. 64 bits is a lot of
address space!
- proc.c: initial return is through new syscall path instead of trapret.
- proc.h: update struct cpu to have some scratch space since syscall saves less
state than int, update struct context to reflect x86-64 calling conventions.
- swtch: simplify for x86-64 calling conventions.
- syscall: add fetcharg to handle x86-64 calling convetions (6 arguments are
passed through registers), and fetchaddr to read a 64-bit value from user space.
- sysfile: update to handle pointers from user space (e.g., sys_exec), which are
64 bits.
- trap.c: no special trap vector for sys calls, because x86-64 has a different
plan for system calls.
- trapasm: one plan for syscalls and one plan for traps (interrupt and
exceptions). On x86-64, the kernel is responsible for switching user/kernel
stacks. To do, xv6 keeps some scratch space in the cpu structure, and uses MSR
GS_KERN_BASE to point to the core's cpu structure (using swapgs).
- types.h: add uint64, and change pde_t to uint64
- usertests: exit() when fork fails, which helped in tracking down one of the
bugs in the switch from 32-bit to 64-bit
- vectors: update to make them 64 bits
- vm.c: use bootgdt in kernel too, program MSRs for syscalls and core-local
state (for swapgs), walk 4 levels in walkpgdir, add DEVSPACETOP, use task
segment to set kernel stack for interrupts (but simpler than in 32-bit mode),
add an extra argument to freevm (size of user part of address space) to avoid
checking all entries till KERNBASE (there are MANY TB before the top 1TB).
- x86: update trapframe to have 64-bit entries, which is what the processor
pushes on syscalls and traps. simplify lgdt and lidt, using struct desctr,
which needs the gcc directives packed and aligned.
TODO:
- use int32 instead of int?
- simplify curproc(). xv6 has per-cpu state again, but this time it must have it.
- avoid repetition in walkpgdir
- fix validateint() in usertests.c
- fix bugs (e.g., observed one a case of entering kernel with invalid gs or proc
2018-09-23 12:24:42 +00:00
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2019-05-31 13:45:59 +00:00
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// set S Previous Privilege mode to User.
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unsigned long x = r_sstatus();
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x &= ~SSTATUS_SPP; // clear SPP to 0 for user mode
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2019-06-03 19:23:12 +00:00
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x |= SSTATUS_SPIE; // enable interrupts in user mode
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2019-05-31 13:45:59 +00:00
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w_sstatus(x);
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// set S Exception Program Counter to the saved user pc.
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w_sepc(p->tf->epc);
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2019-07-24 14:15:45 +00:00
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// tell trampoline.S the user page table to switch to.
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2019-05-31 13:45:59 +00:00
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uint64 satp = MAKE_SATP(p->pagetable);
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// jump to trampoline.S at the top of memory, which
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// switches to the user page table, restores user registers,
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// and switches to user mode with sret.
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2019-07-26 13:38:22 +00:00
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uint64 fn = TRAMPOLINE + (userret - trampoline);
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((void (*)(uint64,uint64))fn)(TRAPFRAME, satp);
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2006-06-13 15:50:40 +00:00
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}
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Checkpoint port of xv6 to x86-64. Passed usertests on 2 processors a few times.
The x86-64 doesn't just add two levels to page tables to support 64 bit
addresses, but is a different processor. For example, calling conventions,
system calls, and segmentation are different from 32-bit x86. Segmentation is
basically gone, but gs/fs in combination with MSRs can be used to hold a
per-core pointer. In general, x86-64 is more straightforward than 32-bit
x86. The port uses code from sv6 and the xv6 "rsc-amd64" branch.
A summary of the changes is as follows:
- Booting: switch to grub instead of xv6's bootloader (pass -kernel to qemu),
because xv6's boot loader doesn't understand 64bit ELF files. And, we don't
care anymore about booting.
- Makefile: use -m64 instead of -m32 flag for gcc, delete boot loader, xv6.img,
bochs, and memfs. For now dont' use -O2, since usertests with -O2 is bigger than
MAXFILE!
- Update gdb.tmpl to be for i386 or x86-64
- Console/printf: use stdarg.h and treat 64-bit addresses different from ints
(32-bit)
- Update elfhdr to be 64 bit
- entry.S/entryother.S: add code to switch to 64-bit mode: build a simple page
table in 32-bit mode before switching to 64-bit mode, share code for entering
boot processor and APs, and tweak boot gdt. The boot gdt is the gdt that the
kernel proper also uses. (In 64-bit mode, the gdt/segmentation and task state
mostly disappear.)
- exec.c: fix passing argv (64-bit now instead of 32-bit).
- initcode.c: use syscall instead of int.
- kernel.ld: load kernel very high, in top terabyte. 64 bits is a lot of
address space!
- proc.c: initial return is through new syscall path instead of trapret.
- proc.h: update struct cpu to have some scratch space since syscall saves less
state than int, update struct context to reflect x86-64 calling conventions.
- swtch: simplify for x86-64 calling conventions.
- syscall: add fetcharg to handle x86-64 calling convetions (6 arguments are
passed through registers), and fetchaddr to read a 64-bit value from user space.
- sysfile: update to handle pointers from user space (e.g., sys_exec), which are
64 bits.
- trap.c: no special trap vector for sys calls, because x86-64 has a different
plan for system calls.
- trapasm: one plan for syscalls and one plan for traps (interrupt and
exceptions). On x86-64, the kernel is responsible for switching user/kernel
stacks. To do, xv6 keeps some scratch space in the cpu structure, and uses MSR
GS_KERN_BASE to point to the core's cpu structure (using swapgs).
- types.h: add uint64, and change pde_t to uint64
- usertests: exit() when fork fails, which helped in tracking down one of the
bugs in the switch from 32-bit to 64-bit
- vectors: update to make them 64 bits
- vm.c: use bootgdt in kernel too, program MSRs for syscalls and core-local
state (for swapgs), walk 4 levels in walkpgdir, add DEVSPACETOP, use task
segment to set kernel stack for interrupts (but simpler than in 32-bit mode),
add an extra argument to freevm (size of user part of address space) to avoid
checking all entries till KERNBASE (there are MANY TB before the top 1TB).
- x86: update trapframe to have 64-bit entries, which is what the processor
pushes on syscalls and traps. simplify lgdt and lidt, using struct desctr,
which needs the gcc directives packed and aligned.
TODO:
- use int32 instead of int?
- simplify curproc(). xv6 has per-cpu state again, but this time it must have it.
- avoid repetition in walkpgdir
- fix validateint() in usertests.c
- fix bugs (e.g., observed one a case of entering kernel with invalid gs or proc
2018-09-23 12:24:42 +00:00
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|
2019-07-01 17:46:11 +00:00
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// interrupts and exceptions from kernel code go here via kernelvec,
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2019-05-31 13:45:59 +00:00
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// on whatever the current kernel stack is.
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// must be 4-byte aligned to fit in stvec.
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2019-06-04 14:43:45 +00:00
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void
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2019-05-31 13:45:59 +00:00
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kerneltrap()
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{
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2019-07-01 17:46:11 +00:00
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int which_dev = 0;
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uint64 sepc = r_sepc();
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2019-06-03 19:23:12 +00:00
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uint64 sstatus = r_sstatus();
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uint64 scause = r_scause();
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if((sstatus & SSTATUS_SPP) == 0)
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2019-05-31 13:45:59 +00:00
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panic("kerneltrap: not from supervisor mode");
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2019-06-05 15:42:03 +00:00
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if(intr_get() != 0)
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panic("kerneltrap: interrupts enabled");
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Checkpoint port of xv6 to x86-64. Passed usertests on 2 processors a few times.
The x86-64 doesn't just add two levels to page tables to support 64 bit
addresses, but is a different processor. For example, calling conventions,
system calls, and segmentation are different from 32-bit x86. Segmentation is
basically gone, but gs/fs in combination with MSRs can be used to hold a
per-core pointer. In general, x86-64 is more straightforward than 32-bit
x86. The port uses code from sv6 and the xv6 "rsc-amd64" branch.
A summary of the changes is as follows:
- Booting: switch to grub instead of xv6's bootloader (pass -kernel to qemu),
because xv6's boot loader doesn't understand 64bit ELF files. And, we don't
care anymore about booting.
- Makefile: use -m64 instead of -m32 flag for gcc, delete boot loader, xv6.img,
bochs, and memfs. For now dont' use -O2, since usertests with -O2 is bigger than
MAXFILE!
- Update gdb.tmpl to be for i386 or x86-64
- Console/printf: use stdarg.h and treat 64-bit addresses different from ints
(32-bit)
- Update elfhdr to be 64 bit
- entry.S/entryother.S: add code to switch to 64-bit mode: build a simple page
table in 32-bit mode before switching to 64-bit mode, share code for entering
boot processor and APs, and tweak boot gdt. The boot gdt is the gdt that the
kernel proper also uses. (In 64-bit mode, the gdt/segmentation and task state
mostly disappear.)
- exec.c: fix passing argv (64-bit now instead of 32-bit).
- initcode.c: use syscall instead of int.
- kernel.ld: load kernel very high, in top terabyte. 64 bits is a lot of
address space!
- proc.c: initial return is through new syscall path instead of trapret.
- proc.h: update struct cpu to have some scratch space since syscall saves less
state than int, update struct context to reflect x86-64 calling conventions.
- swtch: simplify for x86-64 calling conventions.
- syscall: add fetcharg to handle x86-64 calling convetions (6 arguments are
passed through registers), and fetchaddr to read a 64-bit value from user space.
- sysfile: update to handle pointers from user space (e.g., sys_exec), which are
64 bits.
- trap.c: no special trap vector for sys calls, because x86-64 has a different
plan for system calls.
- trapasm: one plan for syscalls and one plan for traps (interrupt and
exceptions). On x86-64, the kernel is responsible for switching user/kernel
stacks. To do, xv6 keeps some scratch space in the cpu structure, and uses MSR
GS_KERN_BASE to point to the core's cpu structure (using swapgs).
- types.h: add uint64, and change pde_t to uint64
- usertests: exit() when fork fails, which helped in tracking down one of the
bugs in the switch from 32-bit to 64-bit
- vectors: update to make them 64 bits
- vm.c: use bootgdt in kernel too, program MSRs for syscalls and core-local
state (for swapgs), walk 4 levels in walkpgdir, add DEVSPACETOP, use task
segment to set kernel stack for interrupts (but simpler than in 32-bit mode),
add an extra argument to freevm (size of user part of address space) to avoid
checking all entries till KERNBASE (there are MANY TB before the top 1TB).
- x86: update trapframe to have 64-bit entries, which is what the processor
pushes on syscalls and traps. simplify lgdt and lidt, using struct desctr,
which needs the gcc directives packed and aligned.
TODO:
- use int32 instead of int?
- simplify curproc(). xv6 has per-cpu state again, but this time it must have it.
- avoid repetition in walkpgdir
- fix validateint() in usertests.c
- fix bugs (e.g., observed one a case of entering kernel with invalid gs or proc
2018-09-23 12:24:42 +00:00
|
|
|
|
2019-07-01 17:46:11 +00:00
|
|
|
if((which_dev = devintr()) == 0){
|
|
|
|
printf("scause %p\n", scause);
|
2019-06-04 18:20:37 +00:00
|
|
|
printf("sepc=%p stval=%p\n", r_sepc(), r_stval());
|
|
|
|
panic("kerneltrap");
|
|
|
|
}
|
2019-07-01 17:46:11 +00:00
|
|
|
|
|
|
|
// give up the CPU if this is a timer interrupt.
|
|
|
|
if(which_dev == 2 && myproc() != 0 && myproc()->state == RUNNING)
|
|
|
|
yield();
|
|
|
|
|
|
|
|
// the yield() may have caused some traps to occur,
|
|
|
|
// so restore trap registers for use by kernelvec.S's sepc instruction.
|
|
|
|
w_sepc(sepc);
|
|
|
|
w_sstatus(sstatus);
|
2019-06-04 18:20:37 +00:00
|
|
|
}
|
|
|
|
|
2019-07-11 14:38:56 +00:00
|
|
|
void
|
|
|
|
clockintr()
|
|
|
|
{
|
|
|
|
acquire(&tickslock);
|
|
|
|
ticks++;
|
|
|
|
wakeup(&ticks);
|
|
|
|
release(&tickslock);
|
|
|
|
}
|
|
|
|
|
2019-06-04 18:20:37 +00:00
|
|
|
// check if it's an external interrupt or software interrupt,
|
|
|
|
// and handle it.
|
2019-06-04 18:25:48 +00:00
|
|
|
// returns 2 if timer interrupt,
|
|
|
|
// 1 if other device,
|
|
|
|
// 0 if not recognized.
|
2019-06-04 18:20:37 +00:00
|
|
|
int
|
|
|
|
devintr()
|
|
|
|
{
|
|
|
|
uint64 scause = r_scause();
|
|
|
|
|
2019-06-03 19:23:12 +00:00
|
|
|
if((scause & 0x8000000000000000L) &&
|
|
|
|
(scause & 0xff) == 9){
|
2019-07-27 09:47:19 +00:00
|
|
|
// this is a supervisor external interrupt, via PLIC.
|
|
|
|
|
|
|
|
// irq indicates which device interrupted.
|
2019-06-03 19:23:12 +00:00
|
|
|
int irq = plic_claim();
|
|
|
|
|
|
|
|
if(irq == UART0_IRQ){
|
|
|
|
uartintr();
|
2019-06-13 13:40:17 +00:00
|
|
|
} else if(irq == VIRTIO0_IRQ){
|
2019-06-13 10:49:02 +00:00
|
|
|
virtio_disk_intr();
|
2019-06-03 19:23:12 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
plic_complete(irq);
|
2019-06-04 18:20:37 +00:00
|
|
|
return 1;
|
2019-07-26 15:09:54 +00:00
|
|
|
} else if(scause == 0x8000000000000001L){
|
2019-07-11 14:38:56 +00:00
|
|
|
// software interrupt from a machine-mode timer interrupt,
|
2019-07-26 14:17:02 +00:00
|
|
|
// forwarded by timervec in kernelvec.S.
|
2019-06-04 18:20:37 +00:00
|
|
|
|
2019-06-05 18:31:13 +00:00
|
|
|
if(cpuid() == 0){
|
2019-07-11 14:38:56 +00:00
|
|
|
clockintr();
|
2019-06-05 18:31:13 +00:00
|
|
|
}
|
2019-06-04 18:20:37 +00:00
|
|
|
|
2019-07-11 14:38:56 +00:00
|
|
|
// acknowledge the software interrupt by clearing
|
|
|
|
// the SSIP bit in sip.
|
2019-06-04 18:20:37 +00:00
|
|
|
w_sip(r_sip() & ~2);
|
|
|
|
|
2019-06-04 18:25:48 +00:00
|
|
|
return 2;
|
2019-06-03 19:23:12 +00:00
|
|
|
} else {
|
2019-06-04 18:20:37 +00:00
|
|
|
return 0;
|
2019-06-03 19:23:12 +00:00
|
|
|
}
|
2019-05-31 13:45:59 +00:00
|
|
|
}
|
2019-06-04 18:20:37 +00:00
|
|
|
|