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Merge branch 'riscv' of g.csail.mit.edu:xv6-dev into riscv

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This commit is contained in:
Robert Morris 2019-09-17 06:08:10 -04:00
parent 2df42355f7 b150908354
commit 0d01de2a32
1 changed files with 3 additions and 1 deletions
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4
Makefile
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@ -152,7 +152,9 @@ QEMUGDB = $(shell if $(QEMU) -help | grep -q '^-gdb'; \
ifndef CPUS
CPUS := 3
endif
QEMUOPTS = -machine virt -kernel $K/kernel -m 3G -smp $(CPUS) -nographic
QEMUEXTRA = -drive file=fs1.img,if=none,format=raw,id=x1 -device virtio-blk-device,drive=x1,bus=virtio-mmio-bus.1
QEMUOPTS = -machine virt -bios none -kernel $K/kernel -m 3G -smp $(CPUS) -nographic
QEMUOPTS += -drive file=fs.img,if=none,format=raw,id=x0 -device virtio-blk-device,drive=x0,bus=virtio-mmio-bus.0
qemu: $K/kernel fs.img