Avoid repition in walkpgdir
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parent
572e106e6f
commit
155c13b7f8
26
mmu.h
26
mmu.h
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@ -91,26 +91,22 @@ struct segdesc {
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// +------+-------+--------------+----------+------------+-------------+
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// \-PMX(va)-/\-PDPX(va)--/ \-PDX(va)-/ \-PTX(va)-/
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#define PMX(va) (((uint64)(va) >> PML4XSHIFT) & PXMASK)
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#define PDPX(va) (((uint64)(va) >> PDPXSHIFT) & PXMASK)
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// page directory index
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#define PDX(va) (((uint64)(va) >> PDXSHIFT) & PXMASK)
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// page table index
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#define PTX(va) (((uint64)(va) >> PTXSHIFT) & PXMASK)
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// construct virtual address from indexes and offset
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#define PGADDR(d, t, o) ((uint64)((d) << PDXSHIFT | (t) << PTXSHIFT | (o)))
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// Page directory and page table constants.
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#define NPDENTRIES 512 // # directory entries per page directory
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#define NPTENTRIES 512 // # PTEs per page table
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#define PGSIZE 4096 // bytes mapped by a page
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#define PTXSHIFT 12 // offset of PTX in a linear address
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#define PGSHIFT 12 // offset of PTX in a linear address
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#define PDXSHIFT 21 // offset of PDX in a linear address
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#define PDPXSHIFT 30 // offset of PDPX in a linear address
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#define PML4XSHIFT 39 // offset of PML4X in a linear address
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#define PXMASK 0X1FF
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#define PXMASK 0x1FF
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#define PXSHIFT(n) (PGSHIFT+(9*(n)))
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#define PDX(va) (((uint64)(va) >> PDXSHIFT) & PXMASK)
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#define PTX(va) (((uint64)(va) >> PGSHIFT) & PXMASK)
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#define PX(n, va) ((((uint64) (va)) >> PXSHIFT(n)) & PXMASK)
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#define L_PML4 3
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// construct virtual address from indexes and offset
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#define PGADDR(d, t, o) ((uint64)((d) << PDXSHIFT | (t) << PGSHIFT | (o)))
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#define PGROUNDUP(sz) (((sz)+PGSIZE-1) & ~(PGSIZE-1))
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#define PGROUNDDOWN(a) (((a)) & ~(PGSIZE-1))
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58
vm.c
58
vm.c
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@ -66,53 +66,21 @@ seginit(void)
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static pte_t *
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walkpgdir(pde_t *pml4, const void *va, int alloc)
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{
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pml4e_t *pml4e;
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pdpe_t *pdp;
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pdpe_t *pdpe;
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pde_t *pgtab = pml4;
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pde_t *pde;
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pde_t *pd;
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pte_t *pgtab;
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// level 4
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pml4e = &pml4[PMX(va)];
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if(*pml4e & PTE_P)
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pdp = (pdpe_t*)P2V(PTE_ADDR(*pml4e));
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else {
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if(!alloc || (pdp = (pdpe_t*)kalloc()) == 0)
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return 0;
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// Make sure all those PTE_P bits are zero.
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memset(pdp, 0, PGSIZE);
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// The permissions here are overly generous, but they can
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// be further restricted by the permissions in the page table
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// entries, if necessary.
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*pml4e = V2P(pdp) | PTE_P | PTE_W | PTE_U;
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int level;
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for (level = L_PML4; level > 0; level--) {
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pde = &pgtab[PX(level, va)];
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if(*pde & PTE_P)
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pgtab = (pte_t*)P2V(PTE_ADDR(*pde));
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else {
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if(!alloc || (pgtab = (pte_t*)kalloc()) == 0)
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return 0;
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memset(pgtab, 0, PGSIZE);
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*pde = V2P(pgtab) | PTE_P | PTE_W | PTE_U;
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}
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}
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// XXX avoid repetition
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// level 3
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pdpe = &pdp[PDPX(va)];
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if(*pdpe & PTE_P)
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pd = (pde_t*)P2V(PTE_ADDR(*pdpe));
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else {
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if(!alloc || (pd = (pde_t*)kalloc()) == 0)
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return 0;
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memset(pd, 0, PGSIZE);
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*pdpe = V2P(pd) | PTE_P | PTE_W | PTE_U;
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}
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// level 2
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pde = &pd[PDX(va)];
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if(*pde & PTE_P)
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pgtab = (pte_t*)P2V(PTE_ADDR(*pde));
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else {
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if(!alloc || (pgtab = (pte_t*)kalloc()) == 0)
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return 0;
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memset(pgtab, 0, PGSIZE);
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*pde = V2P(pgtab) | PTE_P | PTE_W | PTE_U;
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}
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// level 1
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return &pgtab[PTX(va)];
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}
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