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uint32_t -> uint &c

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This commit is contained in:
rtm 2006-07-20 09:07:53 +00:00
parent bd228a8156
commit 2927081628
17 changed files with 252 additions and 271 deletions
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16
bootmain.c
View file

@ -33,8 +33,8 @@
#define SECTSIZE 512
#define ELFHDR ((struct elfhdr *) 0x10000) // scratch space
void readsect(void*, uint32_t);
void readseg(uint32_t, uint32_t, uint32_t);
void readsect(void*, uint);
void readseg(uint, uint, uint);
void
cmain(void)
@ -42,14 +42,14 @@ cmain(void)
struct proghdr *ph, *eph;
// read 1st page off disk
readseg((uint32_t) ELFHDR, SECTSIZE*8, 0);
readseg((uint) ELFHDR, SECTSIZE*8, 0);
// is this a valid ELF?
if (ELFHDR->magic != ELF_MAGIC)
goto bad;
// load each program segment (ignores ph flags)
ph = (struct proghdr *) ((uint8_t *) ELFHDR + ELFHDR->phoff);
ph = (struct proghdr *) ((uchar *) ELFHDR + ELFHDR->phoff);
eph = ph + ELFHDR->phnum;
for (; ph < eph; ph++)
readseg(ph->va, ph->memsz, ph->offset);
@ -68,9 +68,9 @@ bad:
// Read 'count' bytes at 'offset' from kernel into virtual address 'va'.
// Might copy more than asked
void
readseg(uint32_t va, uint32_t count, uint32_t offset)
readseg(uint va, uint count, uint offset)
{
uint32_t end_va;
uint end_va;
va &= 0xFFFFFF;
end_va = va + count;
@ -85,7 +85,7 @@ readseg(uint32_t va, uint32_t count, uint32_t offset)
// We'd write more to memory than asked, but it doesn't matter --
// we load in increasing order.
while (va < end_va) {
readsect((uint8_t*) va, offset);
readsect((uchar*) va, offset);
va += SECTSIZE;
offset++;
}
@ -100,7 +100,7 @@ waitdisk(void)
}
void
readsect(void *dst, uint32_t offset)
readsect(void *dst, uint offset)
{
// wait for disk to be ready
waitdisk();

2
console.c
View file

@ -28,7 +28,7 @@ static void
cons_putc(int c)
{
int crtport = 0x3d4; // io port of CGA
uint16_t *crt = (uint16_t *) 0xB8000; // base of CGA memory
ushort *crt = (ushort *) 0xB8000; // base of CGA memory
int ind;
if(panicked){

12
defs.h
View file

@ -40,8 +40,8 @@ int strncmp(const char *p, const char *q, uint n);
void syscall(void);
// picirq.c
extern uint16_t irq_mask_8259A;
void irq_setmask_8259A(uint16_t mask);
extern ushort irq_mask_8259A;
void irq_setmask_8259A(ushort mask);
void pic_init(void);
// mp.c
@ -50,9 +50,9 @@ void mp_startthem(void);
int mp_bcpu(void);
// lapic
extern uint32_t *lapicaddr;
extern uint *lapicaddr;
void lapic_init(int);
void lapic_startap(uint8_t, int);
void lapic_startap(uchar, int);
void lapic_timerinit(void);
void lapic_timerintr(void);
void lapic_enableintr(void);
@ -66,7 +66,7 @@ void release(struct spinlock*);
int holding(struct spinlock*);
// main.c
void load_icode(struct proc *p, uint8_t *binary, uint size);
void load_icode(struct proc *p, uchar *binary, uint size);
// pipe.c
struct pipe;
@ -87,6 +87,6 @@ void fd_incref(struct fd *fd);
// ide.c
void ide_init(void);
void ide_intr(void);
void* ide_start_read(uint32_t secno, void *dst, uint nsecs);
void* ide_start_read(uint secno, void *dst, uint nsecs);
int ide_finish_read(void *);

46
elf.h
View file

@ -1,32 +1,32 @@
#define ELF_MAGIC 0x464C457FU /* "\x7FELF" in little endian */
struct elfhdr {
uint32_t magic; // must equal ELF_MAGIC
uint8_t elf[12];
uint16_t type;
uint16_t machine;
uint32_t version;
uint32_t entry;
uint32_t phoff;
uint32_t shoff;
uint32_t flags;
uint16_t ehsize;
uint16_t phentsize;
uint16_t phnum;
uint16_t shentsize;
uint16_t shnum;
uint16_t shstrndx;
uint magic; // must equal ELF_MAGIC
uchar elf[12];
ushort type;
ushort machine;
uint version;
uint entry;
uint phoff;
uint shoff;
uint flags;
ushort ehsize;
ushort phentsize;
ushort phnum;
ushort shentsize;
ushort shnum;
ushort shstrndx;
};
struct proghdr {
uint32_t type;
uint32_t offset;
uint32_t va;
uint32_t pa;
uint32_t filesz;
uint32_t memsz;
uint32_t flags;
uint32_t align;
uint type;
uint offset;
uint va;
uint pa;
uint filesz;
uint memsz;
uint flags;
uint align;
};
// Values for Proghdr type

20
ide.c
View file

@ -18,7 +18,8 @@
#define IDE_ERR 0x01
struct ide_request {
uint32_t secno;
int diskno;
uint secno;
void *dst;
uint nsecs;
};
@ -26,7 +27,6 @@ struct ide_request request[NREQUEST];
int head, tail;
struct spinlock ide_lock;
static int diskno = 0;
int disk_channel;
static int
@ -79,14 +79,6 @@ ide_probe_disk1(void)
return (x < 1000);
}
void
ide_set_disk(int d)
{
if (d != 0 && d != 1)
panic("bad disk number");
diskno = d;
}
void
ide_start_request (void)
{
@ -100,13 +92,13 @@ ide_start_request (void)
outb(0x1F3, r->secno & 0xFF);
outb(0x1F4, (r->secno >> 8) & 0xFF);
outb(0x1F5, (r->secno >> 16) & 0xFF);
outb(0x1F6, 0xE0 | ((diskno&1)<<4) | ((r->secno>>24)&0x0F));
outb(0x1F6, 0xE0 | ((r->diskno&1)<<4) | ((r->secno>>24)&0x0F));
outb(0x1F7, 0x20); // CMD 0x20 means read sector
}
}
void *
ide_start_read(uint32_t secno, void *dst, uint nsecs)
ide_start_read(uint secno, void *dst, uint nsecs)
{
struct ide_request *r;
if(!holding(&ide_lock))
@ -122,6 +114,7 @@ ide_start_read(uint32_t secno, void *dst, uint nsecs)
r->secno = secno;
r->dst = dst;
r->nsecs = nsecs;
r->diskno = 0;
ide_start_request();
@ -155,9 +148,10 @@ ide_finish_read(void *c)
}
int
ide_write(uint32_t secno, const void *src, uint nsecs)
ide_write(uint secno, const void *src, uint nsecs)
{
int r;
int diskno = 0;
if(nsecs > 256)
panic("ide_write");

6
lapic.c
View file

@ -92,7 +92,7 @@ enum { /* LAPIC_TDCR */
LAPIC_X1 = 0x0000000B, /* divide by 1 */
};
uint32_t *lapicaddr;
uint *lapicaddr;
static int
lapic_read(int r)
@ -127,7 +127,7 @@ lapic_timerintr(void)
void
lapic_init(int c)
{
uint32_t r, lvt;
uint r, lvt;
cprintf("lapic_init %d\n", c);
@ -180,7 +180,7 @@ cpu(void)
}
void
lapic_startap(uint8_t apicid, int v)
lapic_startap(uchar apicid, int v)
{
int crhi, i;
volatile int j = 0;

14
main.c
View file

@ -11,9 +11,9 @@
#include "spinlock.h"
extern char edata[], end[];
extern uint8_t _binary_user1_start[], _binary_user1_size[];
extern uint8_t _binary_usertests_start[], _binary_usertests_size[];
extern uint8_t _binary_userfs_start[], _binary_userfs_size[];
extern uchar _binary_user1_start[], _binary_user1_size[];
extern uchar _binary_usertests_start[], _binary_usertests_size[];
extern uchar _binary_userfs_start[], _binary_userfs_size[];
extern int use_console_lock;
@ -73,7 +73,7 @@ main0(void)
lapic_enableintr();
// init disk device
//ide_init();
ide_init();
// Enable interrupts on this processor.
cpus[cpu()].nlock--;
@ -81,8 +81,8 @@ main0(void)
p = copyproc(&proc[0]);
load_icode(p, _binary_usertests_start, (uint) _binary_usertests_size);
//load_icode(p, _binary_userfs_start, (uint) _binary_userfs_size);
//load_icode(p, _binary_usertests_start, (uint) _binary_usertests_size);
load_icode(p, _binary_userfs_start, (uint) _binary_userfs_size);
p->state = RUNNABLE;
cprintf("loaded userfs\n");
@ -107,7 +107,7 @@ mpmain(void)
}
void
load_icode(struct proc *p, uint8_t *binary, uint size)
load_icode(struct proc *p, uchar *binary, uint size)
{
int i;
struct elfhdr *elf;

82
mmu.h
View file

@ -124,43 +124,43 @@ struct segdesc {
// Task state segment format (as described by the Pentium architecture book)
struct taskstate {
uint32_t link; // Old ts selector
uintptr_t esp0; // Stack pointers and segment selectors
uint16_t ss0; // after an increase in privilege level
uint16_t padding1;
uintptr_t esp1;
uint16_t ss1;
uint16_t padding2;
uintptr_t esp2;
uint16_t ss2;
uint16_t padding3;
physaddr_t cr3; // Page directory base
uintptr_t eip; // Saved state from last task switch
uint32_t eflags;
uint32_t eax; // More saved state (registers)
uint32_t ecx;
uint32_t edx;
uint32_t ebx;
uintptr_t esp;
uintptr_t ebp;
uint32_t esi;
uint32_t edi;
uint16_t es; // Even more saved state (segment selectors)
uint16_t padding4;
uint16_t cs;
uint16_t padding5;
uint16_t ss;
uint16_t padding6;
uint16_t ds;
uint16_t padding7;
uint16_t fs;
uint16_t padding8;
uint16_t gs;
uint16_t padding9;
uint16_t ldt;
uint16_t padding10;
uint16_t t; // Trap on task switch
uint16_t iomb; // I/O map base address
uint link; // Old ts selector
uint * esp0; // Stack pointers and segment selectors
ushort ss0; // after an increase in privilege level
ushort padding1;
uint * esp1;
ushort ss1;
ushort padding2;
uint * esp2;
ushort ss2;
ushort padding3;
void * cr3; // Page directory base
uint * eip; // Saved state from last task switch
uint eflags;
uint eax; // More saved state (registers)
uint ecx;
uint edx;
uint ebx;
uint * esp;
uint * ebp;
uint esi;
uint edi;
ushort es; // Even more saved state (segment selectors)
ushort padding4;
ushort cs;
ushort padding5;
ushort ss;
ushort padding6;
ushort ds;
ushort padding7;
ushort fs;
ushort padding8;
ushort gs;
ushort padding9;
ushort ldt;
ushort padding10;
ushort t; // Trap on task switch
ushort iomb; // I/O map base address
};
// Gate descriptors for interrupts and traps
@ -185,7 +185,7 @@ struct gatedesc {
// this interrupt/trap gate explicitly using an int instruction.
#define SETGATE(gate, istrap, sel, off, d) \
{ \
(gate).off_15_0 = (uint32_t) (off) & 0xffff; \
(gate).off_15_0 = (uint) (off) & 0xffff; \
(gate).ss = (sel); \
(gate).args = 0; \
(gate).rsv1 = 0; \
@ -193,13 +193,13 @@ struct gatedesc {
(gate).s = 0; \
(gate).dpl = (d); \
(gate).p = 1; \
(gate).off_31_16 = (uint32_t) (off) >> 16; \
(gate).off_31_16 = (uint) (off) >> 16; \
}
// Set up a call gate descriptor.
#define SETCALLGATE(gate, ss, off, d) \
{ \
(gate).off_15_0 = (uint32_t) (off) & 0xffff; \
(gate).off_15_0 = (uint) (off) & 0xffff; \
(gate).ss = (ss); \
(gate).args = 0; \
(gate).rsv1 = 0; \
@ -207,7 +207,7 @@ struct gatedesc {
(gate).s = 0; \
(gate).dpl = (d); \
(gate).p = 1; \
(gate).off_31_16 = (uint32_t) (off) >> 16; \
(gate).off_31_16 = (uint) (off) >> 16; \
}
#endif /* !__ASSEMBLER__ */

38
mp.c
View file

@ -37,12 +37,12 @@ int ncpu;
static struct cpu *bcpu;
static struct mp*
mp_scan(uint8_t *addr, int len)
mp_scan(uchar *addr, int len)
{
uint8_t *e, *p, sum;
uchar *e, *p, sum;
int i;
cprintf("scanning: 0x%x\n", (uint32_t)addr);
cprintf("scanning: 0x%x\n", (uint)addr);
e = addr+len;
for(p = addr; p < e; p += sizeof(struct mp)){
if(memcmp(p, "_MP_", 4))
@ -59,8 +59,8 @@ mp_scan(uint8_t *addr, int len)
static struct mp*
mp_search(void)
{
uint8_t *bda;
uint32_t p;
uchar *bda;
uint p;
struct mp *mp;
/*
@ -70,25 +70,25 @@ mp_search(void)
* 2) in the last KB of system base memory;
* 3) in the BIOS ROM between 0xE0000 and 0xFFFFF.
*/
bda = (uint8_t*) 0x400;
bda = (uchar*) 0x400;
if((p = (bda[0x0F]<<8)|bda[0x0E])){
if((mp = mp_scan((uint8_t*) p, 1024)))
if((mp = mp_scan((uchar*) p, 1024)))
return mp;
}
else{
p = ((bda[0x14]<<8)|bda[0x13])*1024;
if((mp = mp_scan((uint8_t*)p-1024, 1024)))
if((mp = mp_scan((uchar*)p-1024, 1024)))
return mp;
}
return mp_scan((uint8_t*)0xF0000, 0x10000);
return mp_scan((uchar*)0xF0000, 0x10000);
}
static int
mp_detect(void)
{
struct mpctb *pcmp;
uint8_t *p, sum;
uint32_t length;
uchar *p, sum;
uint length;
/*
* Search for an MP configuration table. For now,
@ -106,7 +106,7 @@ mp_detect(void)
length = pcmp->length;
sum = 0;
for(p = (uint8_t*)pcmp; length; length--)
for(p = (uchar*)pcmp; length; length--)
sum += *p++;
if(sum || (pcmp->version != 1 && pcmp->version != 4))
@ -120,7 +120,7 @@ void
mp_init(void)
{
int r;
uint8_t *p, *e;
uchar *p, *e;
struct mpctb *mpctb;
struct mppe *proc;
struct mpbe *bus;
@ -137,10 +137,10 @@ mp_init(void)
* is guaranteed to be in order such that only one pass is necessary.
*/
mpctb = (struct mpctb *) mp->physaddr;
lapicaddr = (uint32_t *) mpctb->lapicaddr;
lapicaddr = (uint *) mpctb->lapicaddr;
cprintf("apicaddr: %x\n", lapicaddr);
p = ((uint8_t*)mpctb)+sizeof(struct mpctb);
e = ((uint8_t*)mpctb)+mpctb->length;
p = ((uchar*)mpctb)+sizeof(struct mpctb);
e = ((uchar*)mpctb)+mpctb->length;
while(p < e) {
switch(*p){
@ -195,18 +195,18 @@ extern void mpmain(void);
void
mp_startthem(void)
{
extern uint8_t _binary_bootother_start[], _binary_bootother_size[];
extern uchar _binary_bootother_start[], _binary_bootother_size[];
extern int main();
int c;
memmove((void *) APBOOTCODE,_binary_bootother_start,
(uint32_t) _binary_bootother_size);
(uint) _binary_bootother_size);
for(c = 0; c < ncpu; c++){
if (c == cpu()) continue;
cprintf ("starting processor %d\n", c);
*(uint *)(APBOOTCODE-4) = (uint) (cpus[c].mpstack) + MPSTACK; // tell it what to use for %esp
*(uint *)(APBOOTCODE-8) = (uint)mpmain; // tell it where to jump to
lapic_startap(cpus[c].apicid, (uint32_t) APBOOTCODE);
lapic_startap(cpus[c].apicid, (uint) APBOOTCODE);
}
}

82
mp.h
View file

@ -5,63 +5,63 @@
*/
struct mp { /* floating pointer */
uint8_t signature[4]; /* "_MP_" */
physaddr_t physaddr; /* physical address of MP configuration table */
uint8_t length; /* 1 */
uint8_t specrev; /* [14] */
uint8_t checksum; /* all bytes must add up to 0 */
uint8_t type; /* MP system configuration type */
uint8_t imcrp;
uint8_t reserved[3];
uchar signature[4]; /* "_MP_" */
void* physaddr; /* physical address of MP configuration table */
uchar length; /* 1 */
uchar specrev; /* [14] */
uchar checksum; /* all bytes must add up to 0 */
uchar type; /* MP system configuration type */
uchar imcrp;
uchar reserved[3];
};
struct mpctb { /* configuration table header */
uint8_t signature[4]; /* "PCMP" */
uint16_t length; /* total table length */
uint8_t version; /* [14] */
uint8_t checksum; /* all bytes must add up to 0 */
uint8_t product[20]; /* product id */
uintptr_t oemtable; /* OEM table pointer */
uint16_t oemlength; /* OEM table length */
uint16_t entry; /* entry count */
uintptr_t lapicaddr; /* address of local APIC */
uint16_t xlength; /* extended table length */
uint8_t xchecksum; /* extended table checksum */
uint8_t reserved;
uchar signature[4]; /* "PCMP" */
ushort length; /* total table length */
uchar version; /* [14] */
uchar checksum; /* all bytes must add up to 0 */
uchar product[20]; /* product id */
uint * oemtable; /* OEM table pointer */
ushort oemlength; /* OEM table length */
ushort entry; /* entry count */
uint * lapicaddr; /* address of local APIC */
ushort xlength; /* extended table length */
uchar xchecksum; /* extended table checksum */
uchar reserved;
};
struct mppe { /* processor table entry */
uint8_t type; /* entry type (0) */
uint8_t apicid; /* local APIC id */
uint8_t version; /* local APIC verison */
uint8_t flags; /* CPU flags */
uint8_t signature[4]; /* CPU signature */
uint32_t feature; /* feature flags from CPUID instruction */
uint8_t reserved[8];
uchar type; /* entry type (0) */
uchar apicid; /* local APIC id */
uchar version; /* local APIC verison */
uchar flags; /* CPU flags */
uchar signature[4]; /* CPU signature */
uint feature; /* feature flags from CPUID instruction */
uchar reserved[8];
};
struct mpbe { /* bus table entry */
uint8_t type; /* entry type (1) */
uint8_t busno; /* bus id */
uchar type; /* entry type (1) */
uchar busno; /* bus id */
char string[6]; /* bus type string */
};
struct mpioapic { /* I/O APIC table entry */
uint8_t type; /* entry type (2) */
uint8_t apicno; /* I/O APIC id */
uint8_t version; /* I/O APIC version */
uint8_t flags; /* I/O APIC flags */
uintptr_t addr; /* I/O APIC address */
uchar type; /* entry type (2) */
uchar apicno; /* I/O APIC id */
uchar version; /* I/O APIC version */
uchar flags; /* I/O APIC flags */
uint * addr; /* I/O APIC address */
};
struct mpie { /* interrupt table entry */
uint8_t type; /* entry type ([34]) */
uint8_t intr; /* interrupt type */
uint16_t flags; /* interrupt flag */
uint8_t busno; /* source bus id */
uint8_t irq; /* source bus irq */
uint8_t apicno; /* destination APIC id */
uint8_t intin; /* destination APIC [L]INTIN# */
uchar type; /* entry type ([34]) */
uchar intr; /* interrupt type */
ushort flags; /* interrupt flag */
uchar busno; /* source bus id */
uchar irq; /* source bus irq */
uchar apicno; /* destination APIC id */
uchar intin; /* destination APIC [L]INTIN# */
};
enum { /* table entry types */

4
picirq.c
View file

@ -12,7 +12,7 @@
// Current IRQ mask.
// Initial IRQ mask has interrupt 2 enabled (for slave 8259A).
uint16_t irq_mask_8259A = 0xFFFF & ~(1<<IRQ_SLAVE);
ushort irq_mask_8259A = 0xFFFF & ~(1<<IRQ_SLAVE);
/* Initialize the 8259A interrupt controllers. */
void
@ -71,7 +71,7 @@ pic_init(void)
}
void
irq_setmask_8259A(uint16_t mask)
irq_setmask_8259A(ushort mask)
{
int i;
irq_mask_8259A = mask;

2
proc.h
View file

@ -65,7 +65,7 @@ extern struct proc *curproc[NCPU]; // can be NULL if no proc running.
#define MPSTACK 512
struct cpu {
uint8_t apicid; // Local APIC ID
uchar apicid; // Local APIC ID
struct jmpbuf jmpbuf;
char mpstack[MPSTACK]; // per-cpu start-up stack, only used to get into main()
struct proc *lastproc; // last proc scheduled on this cpu (never NULL)

2
spinlock.h
View file

@ -1,5 +1,5 @@
struct spinlock {
uint locked;
uint32_t pc;
uint pc;
int cpu;
};

6
string.c
View file

@ -15,8 +15,8 @@ memset(void *dst, int c, uint n)
int
memcmp(const void *v1, const void *v2, uint n)
{
const uint8_t *s1 = (const uint8_t *) v1;
const uint8_t *s2 = (const uint8_t *) v2;
const uchar *s1 = (const uchar *) v1;
const uchar *s2 = (const uchar *) v2;
while (n-- > 0) {
if (*s1 != *s2)
@ -55,7 +55,7 @@ strncmp(const char *p, const char *q, uint n)
if (n == 0)
return 0;
else
return (int) ((uint8_t) *p - (uint8_t) *q);
return (int) ((uchar) *p - (uchar) *q);
}
// Memcpy is deprecated and should NOT be called.

2
syscall.c
View file

@ -235,8 +235,10 @@ sys_block(void)
if ((c = ide_start_read(i, buf, 1)) == 0) {
panic("couldn't start read\n");
}
#if 0
cprintf("call sleep\n");
sleep (c, &ide_lock);
#endif
if (ide_finish_read(c)) {
panic("couldn't do read\n");
}

12
types.h
View file

@ -1,9 +1,3 @@
typedef unsigned int uint;
typedef unsigned long long uint64_t;
typedef unsigned int uint32_t;
typedef unsigned short uint16_t;
typedef unsigned char uint8_t;
typedef uint32_t uintptr_t;
typedef uint32_t physaddr_t;
typedef unsigned int uint;
typedef unsigned short ushort;
typedef unsigned char uchar;

177
x86.h
View file

@ -1,37 +1,36 @@
static __inline void breakpoint(void) __attribute__((always_inline));
static __inline uint8_t inb(int port) __attribute__((always_inline));
static __inline uchar inb(int port) __attribute__((always_inline));
static __inline void insb(int port, void *addr, int cnt) __attribute__((always_inline));
static __inline uint16_t inw(int port) __attribute__((always_inline));
static __inline ushort inw(int port) __attribute__((always_inline));
static __inline void insw(int port, void *addr, int cnt) __attribute__((always_inline));
static __inline uint32_t inl(int port) __attribute__((always_inline));
static __inline uint inl(int port) __attribute__((always_inline));
static __inline void insl(int port, void *addr, int cnt) __attribute__((always_inline));
static __inline void outb(int port, uint8_t data) __attribute__((always_inline));
static __inline void outb(int port, uchar data) __attribute__((always_inline));
static __inline void outsb(int port, const void *addr, int cnt) __attribute__((always_inline));
static __inline void outw(int port, uint16_t data) __attribute__((always_inline));
static __inline void outw(int port, ushort data) __attribute__((always_inline));
static __inline void outsw(int port, const void *addr, int cnt) __attribute__((always_inline));
static __inline void outsl(int port, const void *addr, int cnt) __attribute__((always_inline));
static __inline void outl(int port, uint32_t data) __attribute__((always_inline));
static __inline void outl(int port, uint data) __attribute__((always_inline));
static __inline void invlpg(void *addr) __attribute__((always_inline));
struct segdesc;
static __inline void lgdt(struct segdesc *p, int) __attribute__((always_inline));
struct gatedesc;
static __inline void lidt(struct gatedesc *p, int) __attribute__((always_inline));
static __inline void lldt(uint16_t sel) __attribute__((always_inline));
static __inline void ltr(uint16_t sel) __attribute__((always_inline));
static __inline void lcr0(uint32_t val) __attribute__((always_inline));
static __inline uint32_t rcr0(void) __attribute__((always_inline));
static __inline uint32_t rcr2(void) __attribute__((always_inline));
static __inline void lcr3(uint32_t val) __attribute__((always_inline));
static __inline uint32_t rcr3(void) __attribute__((always_inline));
static __inline void lcr4(uint32_t val) __attribute__((always_inline));
static __inline uint32_t rcr4(void) __attribute__((always_inline));
static __inline void lldt(ushort sel) __attribute__((always_inline));
static __inline void ltr(ushort sel) __attribute__((always_inline));
static __inline void lcr0(uint val) __attribute__((always_inline));
static __inline uint rcr0(void) __attribute__((always_inline));
static __inline uint rcr2(void) __attribute__((always_inline));
static __inline void lcr3(uint val) __attribute__((always_inline));
static __inline uint rcr3(void) __attribute__((always_inline));
static __inline void lcr4(uint val) __attribute__((always_inline));
static __inline uint rcr4(void) __attribute__((always_inline));
static __inline void tlbflush(void) __attribute__((always_inline));
static __inline uint32_t read_eflags(void) __attribute__((always_inline));
static __inline void write_eflags(uint32_t eflags) __attribute__((always_inline));
static __inline uint32_t read_ebp(void) __attribute__((always_inline));
static __inline uint32_t read_esp(void) __attribute__((always_inline));
static __inline void cpuid(uint32_t info, uint32_t *eaxp, uint32_t *ebxp, uint32_t *ecxp, uint32_t *edxp);
static __inline uint64_t read_tsc(void) __attribute__((always_inline));
static __inline uint read_eflags(void) __attribute__((always_inline));
static __inline void write_eflags(uint eflags) __attribute__((always_inline));
static __inline uint read_ebp(void) __attribute__((always_inline));
static __inline uint read_esp(void) __attribute__((always_inline));
static __inline void cpuid(uint info, uint *eaxp, uint *ebxp, uint *ecxp, uint *edxp);
static __inline void cli(void) __attribute__((always_inline));
static __inline void sti(void) __attribute__((always_inline));
@ -41,10 +40,10 @@ breakpoint(void)
__asm __volatile("int3");
}
static __inline uint8_t
static __inline uchar
inb(int port)
{
uint8_t data;
uchar data;
__asm __volatile("inb %w1,%0" : "=a" (data) : "d" (port));
return data;
}
@ -58,10 +57,10 @@ insb(int port, void *addr, int cnt)
"memory", "cc");
}
static __inline uint16_t
static __inline ushort
inw(int port)
{
uint16_t data;
ushort data;
__asm __volatile("inw %w1,%0" : "=a" (data) : "d" (port));
return data;
}
@ -75,10 +74,10 @@ insw(int port, void *addr, int cnt)
"memory", "cc");
}
static __inline uint32_t
static __inline uint
inl(int port)
{
uint32_t data;
uint data;
__asm __volatile("inl %w1,%0" : "=a" (data) : "d" (port));
return data;
}
@ -93,7 +92,7 @@ insl(int port, void *addr, int cnt)
}
static __inline void
outb(int port, uint8_t data)
outb(int port, uchar data)
{
__asm __volatile("outb %0,%w1" : : "a" (data), "d" (port));
}
@ -108,7 +107,7 @@ outsb(int port, const void *addr, int cnt)
}
static __inline void
outw(int port, uint16_t data)
outw(int port, ushort data)
{
__asm __volatile("outw %0,%w1" : : "a" (data), "d" (port));
}
@ -132,7 +131,7 @@ outsl(int port, const void *addr, int cnt)
}
static __inline void
outl(int port, uint32_t data)
outl(int port, uint data)
{
__asm __volatile("outl %0,%w1" : : "a" (data), "d" (port));
}
@ -146,7 +145,7 @@ invlpg(void *addr)
static __inline void
lgdt(struct segdesc *p, int size)
{
volatile uint16_t pd[3];
volatile ushort pd[3];
pd[0] = size-1;
pd[1] = (uint)p;
@ -158,7 +157,7 @@ lgdt(struct segdesc *p, int size)
static __inline void
lidt(struct gatedesc *p, int size)
{
volatile uint16_t pd[3];
volatile ushort pd[3];
pd[0] = size-1;
pd[1] = (uint)p;
@ -168,63 +167,63 @@ lidt(struct gatedesc *p, int size)
}
static __inline void
lldt(uint16_t sel)
lldt(ushort sel)
{
__asm __volatile("lldt %0" : : "r" (sel));
}
static __inline void
ltr(uint16_t sel)
ltr(ushort sel)
{
__asm __volatile("ltr %0" : : "r" (sel));
}
static __inline void
lcr0(uint32_t val)
lcr0(uint val)
{
__asm __volatile("movl %0,%%cr0" : : "r" (val));
}
static __inline uint32_t
static __inline uint
rcr0(void)
{
uint32_t val;
uint val;
__asm __volatile("movl %%cr0,%0" : "=r" (val));
return val;
}
static __inline uint32_t
static __inline uint
rcr2(void)
{
uint32_t val;
uint val;
__asm __volatile("movl %%cr2,%0" : "=r" (val));
return val;
}
static __inline void
lcr3(uint32_t val)
lcr3(uint val)
{
__asm __volatile("movl %0,%%cr3" : : "r" (val));
}
static __inline uint32_t
static __inline uint
rcr3(void)
{
uint32_t val;
uint val;
__asm __volatile("movl %%cr3,%0" : "=r" (val));
return val;
}
static __inline void
lcr4(uint32_t val)
lcr4(uint val)
{
__asm __volatile("movl %0,%%cr4" : : "r" (val));
}
static __inline uint32_t
static __inline uint
rcr4(void)
{
uint32_t cr4;
uint cr4;
__asm __volatile("movl %%cr4,%0" : "=r" (cr4));
return cr4;
}
@ -232,69 +231,69 @@ rcr4(void)
static __inline void
tlbflush(void)
{
uint32_t cr3;
uint cr3;
__asm __volatile("movl %%cr3,%0" : "=r" (cr3));
__asm __volatile("movl %0,%%cr3" : : "r" (cr3));
}
static __inline uint32_t
static __inline uint
read_eflags(void)
{
uint32_t eflags;
uint eflags;
__asm __volatile("pushfl; popl %0" : "=r" (eflags));
return eflags;
}
static __inline void
write_eflags(uint32_t eflags)
write_eflags(uint eflags)
{
__asm __volatile("pushl %0; popfl" : : "r" (eflags));
}
static __inline uint32_t
static __inline uint
read_ebp(void)
{
uint32_t ebp;
uint ebp;
__asm __volatile("movl %%ebp,%0" : "=r" (ebp));
return ebp;
}
static __inline uint32_t
static __inline uint
read_esp(void)
{
uint32_t esp;
uint esp;
__asm __volatile("movl %%esp,%0" : "=r" (esp));
return esp;
}
static __inline uint32_t
static __inline uint
read_esi(void)
{
uint32_t esi;
uint esi;
__asm __volatile("movl %%esi,%0" : "=r" (esi));
return esi;
}
static __inline uint32_t
static __inline uint
read_edi(void)
{
uint32_t edi;
uint edi;
__asm __volatile("movl %%edi,%0" : "=r" (edi));
return edi;
}
static __inline uint32_t
static __inline uint
read_ebx(void)
{
uint32_t ebx;
uint ebx;
__asm __volatile("movl %%ebx,%0" : "=r" (ebx));
return ebx;
}
static __inline void
cpuid(uint32_t info, uint32_t *eaxp, uint32_t *ebxp, uint32_t *ecxp, uint32_t *edxp)
cpuid(uint info, uint *eaxp, uint *ebxp, uint *ecxp, uint *edxp)
{
uint32_t eax, ebx, ecx, edx;
uint eax, ebx, ecx, edx;
asm volatile("cpuid"
: "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
: "a" (info));
@ -308,10 +307,10 @@ cpuid(uint32_t info, uint32_t *eaxp, uint32_t *ebxp, uint32_t *ecxp, uint32_t *e
*edxp = edx;
}
static __inline uint32_t
cmpxchg(uint32_t oldval, uint32_t newval, volatile uint32_t* lock_addr)
static __inline uint
cmpxchg(uint oldval, uint newval, volatile uint* lock_addr)
{
uint32_t result;
uint result;
__asm__ __volatile__(
"lock; cmpxchgl %2, %0"
:"+m" (*lock_addr), "=a" (result) : "r"(newval), "1"(oldval) : "cc"
@ -319,14 +318,6 @@ cmpxchg(uint32_t oldval, uint32_t newval, volatile uint32_t* lock_addr)
return result;
}
static __inline uint64_t
read_tsc(void)
{
uint64_t tsc;
__asm __volatile("rdtsc" : "=A" (tsc));
return tsc;
}
static __inline void
cli(void)
{
@ -341,30 +332,30 @@ sti(void)
struct trapframe {
/* registers as pushed by pusha */
uint32_t edi;
uint32_t esi;
uint32_t ebp;
uint32_t oesp; /* Useless */
uint32_t ebx;
uint32_t edx;
uint32_t ecx;
uint32_t eax;
uint edi;
uint esi;
uint ebp;
uint oesp; /* Useless */
uint ebx;
uint edx;
uint ecx;
uint eax;
/* rest of trap frame */
uint16_t es;
uint16_t padding1;
uint16_t ds;
uint16_t padding2;
uint32_t trapno;
ushort es;
ushort padding1;
ushort ds;
ushort padding2;
uint trapno;
/* below here defined by x86 hardware */
uint32_t err;
uintptr_t eip;
uint16_t cs;
uint16_t padding3;
uint32_t eflags;
uint err;
uint eip;
ushort cs;
ushort padding3;
uint eflags;
/* below here only when crossing rings, such as from user to kernel */
uintptr_t esp;
uint16_t ss;
uint16_t padding4;
uint esp;
ushort ss;
ushort padding4;
};
#define MAX_IRQS 16 // Number of IRQs