bring bootasm and bootother more in sync
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5d1f4b8a3a
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46
bootasm.S
46
bootasm.S
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@ -9,10 +9,11 @@
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.set PROT_MODE_DSEG, 0x10 # kernel data segment selector
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.set CR0_PE_ON, 0x1 # protected mode enable flag
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.globl start # Entry point
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.globl start
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start:
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.code16 # This runs in real mode
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.code16 # Assemble for 16-bit mode
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cli # Disable interrupts
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cld # String operations increment
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# Set up the important data segment registers (DS, ES, SS).
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xorw %ax,%ax # Segment number zero
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@ -40,28 +41,21 @@ seta20.2:
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movb $0xdf,%al # 0xdf -> port 0x60
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outb %al,$0x60
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# Switch from real to protected mode
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# The descriptors in our GDT allow all physical memory to be accessed.
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# Furthermore, the descriptors have base addresses of 0, so that the
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# segment translation is a NOP, ie. virtual addresses are identical to
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# their physical addresses. With this setup, immediately after
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# enabling protected mode it will still appear to this code
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# that it is running directly on physical memory with no translation.
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# This initial NOP-translation setup is required by the processor
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# to ensure that the transition to protected mode occurs smoothly.
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real_to_prot:
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cli # Mandatory since we dont set up an IDT
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lgdt gdtdesc # load GDT -- mandatory in protected mode
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movl %cr0, %eax # turn on protected mode
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orl $CR0_PE_ON, %eax #
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movl %eax, %cr0 #
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### CPU magic: jump to relocation, flush prefetch queue, and reload %cs
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### Has the effect of just jmp to the next instruction, but simultaneous
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### loads CS with $PROT_MODE_CSEG.
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//PAGEBREAK!
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# Switch from real to protected mode, using a bootstrap GDT
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# and segment translation that makes virtual addresses
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# identical to their physical addresses, so that the
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# effective memory map does not change during the switch.
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lgdt gdtdesc
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movl %cr0, %eax
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orl $CR0_PE_ON, %eax
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movl %eax, %cr0
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# Jump to next instruction, but in 32-bit code segment.
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# Switches processor into 32-bit mode.
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ljmp $PROT_MODE_CSEG, $protcseg
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#### we are in 32-bit protected mode (hence the .code32)
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.code32
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.code32 # Assemble for 32-bit mode
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protcseg:
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# Set up the protected-mode data segment registers
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movw $PROT_MODE_DSEG, %ax # Our data segment selector
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@ -71,13 +65,13 @@ protcseg:
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movw %ax, %gs # -> GS
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movw %ax, %ss # -> SS: Stack Segment
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# Set up the stack pointer, growing downward from 0x7c00.
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# Set up the stack pointer and call into C.
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movl $start, %esp
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call cmain
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call cmain # finish the boot load from C.
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# cmain() should not return
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# If cmain returns (it shouldn't), loop.
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spin:
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jmp spin # ..but in case it does, spin
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jmp spin
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# Bootstrap GDT
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.p2align 2 # force 4 byte alignment
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48
bootother.S
48
bootother.S
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@ -12,14 +12,19 @@
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# mp.c causes each non-boot CPU in turn to jump to start.
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# mp.c puts the correct %esp in start-4, and the place to jump
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# to in start-8.
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#
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# This code is identical to bootasm.S except:
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# - it does not need to enable A20
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# - it uses 0(start-4) for the %esp
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# - it jumps to 0(start-8) instead of calling cmain
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.set PROT_MODE_CSEG,0x8 # code segment selector
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.set PROT_MODE_DSEG,0x10 # data segment selector
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.set PROT_MODE_CSEG, 0x8 # kernel code segment selector
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.set PROT_MODE_DSEG, 0x10 # kernel data segment selector
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.set CR0_PE_ON, 0x1 # protected mode enable flag
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.globl start
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start:
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.code16 # This runs in real mode
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.code16 # Assemble for 16-bit mode
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cli # Disable interrupts
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cld # String operations increment
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@ -29,31 +34,21 @@ start:
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movw %ax,%es # -> Extra Segment
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movw %ax,%ss # -> Stack Segment
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# Set up the stack pointer, growing downward from 0x7000-8.
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movw $start-8,%sp # Stack Pointer
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//PAGEBREAK!
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# Switch from real to protected mode, using a bootstrap GDT
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# and segment translation that makes virtual addresses
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# identical to their physical addresses, so that the
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# effective memory map does not change during the switch.
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lgdt gdtdesc
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movl %cr0, %eax
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orl $CR0_PE_ON, %eax
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movl %eax, %cr0
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# Switch from real to protected mode
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# The descriptors in our GDT allow all physical memory to be accessed.
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# Furthermore, the descriptors have base addresses of 0, so that the
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# segment translation is a NOP, ie. virtual addresses are identical to
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# their physical addresses. With this setup, immediately after
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# enabling protected mode it will still appear to this code
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# that it is running directly on physical memory with no translation.
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# This initial NOP-translation setup is required by the processor
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# to ensure that the transition to protected mode occurs smoothly.
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lgdt gdtdesc # load GDT -- mandatory in protected mode
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movl %cr0, %eax # turn on protected mode
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orl $CR0_PE_ON, %eax #
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movl %eax, %cr0 #
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# CPU magic: jump to relocation, flush prefetch queue, and reload %cs
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# Has the effect of just jmp to the next instruction, but simultaneous
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# loads CS with $PROT_MODE_CSEG.
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# Jump to next instruction, but in 32-bit code segment.
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# Switches processor into 32-bit mode.
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ljmp $PROT_MODE_CSEG, $protcseg
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# We are now in 32-bit protected mode (hence the .code32)
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.code32
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.code32 # Assemble for 32-bit mode
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protcseg:
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# Set up the protected-mode data segment registers
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movw $PROT_MODE_DSEG, %ax # Our data segment selector
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@ -63,10 +58,11 @@ protcseg:
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movw %ax, %gs # -> GS
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movw %ax, %ss # -> SS: Stack Segment
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movl start-8, %eax
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movl start-4, %esp
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movl start-8, %eax
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jmp *%eax
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# Bootstrap GDT
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.p2align 2 # force 4 byte alignment
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gdt:
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SEG_NULLASM # null seg
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