nit
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2
defs.h
2
defs.h
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@ -40,8 +40,6 @@ int strncmp(const char *p, const char *q, uint n);
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void syscall(void);
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// picirq.c
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extern ushort irq_mask_8259A;
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void irq_setmask_8259A(ushort mask);
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void pic_init(void);
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// mp.c
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36
picirq.c
36
picirq.c
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@ -12,7 +12,24 @@
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// Current IRQ mask.
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// Initial IRQ mask has interrupt 2 enabled (for slave 8259A).
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ushort irq_mask_8259A = 0xFFFF & ~(1<<IRQ_SLAVE);
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static ushort irq_mask_8259A = 0xFFFF & ~(1<<IRQ_SLAVE);
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static void
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irq_setmask_8259A(ushort mask)
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{
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int i;
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irq_mask_8259A = mask;
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outb(IO_PIC1+1, (char)mask);
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outb(IO_PIC2+1, (char)(mask >> 8));
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cprintf("%d: enabled interrupts:", cpu());
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for (i = 0; i < 16; i++)
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if (~mask & (1<<i))
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cprintf(" %d", i);
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cprintf("\n");
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}
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/* Initialize the 8259A interrupt controllers. */
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void
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@ -68,20 +85,3 @@ pic_init(void)
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if (irq_mask_8259A != 0xFFFF)
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irq_setmask_8259A(irq_mask_8259A);
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}
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void
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irq_setmask_8259A(ushort mask)
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{
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int i;
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irq_mask_8259A = mask;
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outb(IO_PIC1+1, (char)mask);
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outb(IO_PIC2+1, (char)(mask >> 8));
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cprintf("%d: enabled interrupts:", cpu());
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for (i = 0; i < 16; i++)
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if (~mask & (1<<i))
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cprintf(" %d", i);
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cprintf("\n");
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}
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