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separate out timer init code for clarity

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This commit is contained in:
Robert Morris 2019-07-28 13:16:49 -04:00
parent 1ec50c5848
commit 47b9cfee49
1 changed files with 24 additions and 10 deletions
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34
kernel/start.c
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@ -5,6 +5,7 @@
#include "defs.h" #include "defs.h"
void main(); void main();
void timerinit();
// entry.S needs one stack per CPU. // entry.S needs one stack per CPU.
__attribute__ ((aligned (16))) char stack0[4096 * NCPU]; __attribute__ ((aligned (16))) char stack0[4096 * NCPU];
@ -36,15 +37,31 @@ start()
w_medeleg(0xffff); w_medeleg(0xffff);
w_mideleg(0xffff); w_mideleg(0xffff);
// ask for clock interrupts.
timerinit();
// keep each CPU's hartid in its tp register, for cpuid().
int id = r_mhartid();
w_tp(id);
// switch to supervisor mode and jump to main().
asm volatile("mret");
}
// set up to receive timer interrupts in machine mode,
// which arrive at timervec in kernelvec.S,
// which turns them into software interrupts for
// devintr() in trap.c.
void
timerinit()
{
// each CPU has a separate source of timer interrupts.
int id = r_mhartid(); int id = r_mhartid();
// set up to receive timer interrupts in machine mode,
// which arrive at timervec in kernelvec.S,
// which turns them into software interrupts for
// devintr() in trap.c.
// ask the CLINT for a timer interrupt. // ask the CLINT for a timer interrupt.
int interval = 1000000; // cycles; about 1/10th second in qemu. int interval = 1000000; // cycles; about 1/10th second in qemu.
*(uint64*)CLINT_MTIMECMP(id) = *(uint64*)CLINT_MTIME + interval; *(uint64*)CLINT_MTIMECMP(id) = *(uint64*)CLINT_MTIME + interval;
// prepare information in scratch[] for timervec. // prepare information in scratch[] for timervec.
// scratch[0..3] : space for timervec to save registers. // scratch[0..3] : space for timervec to save registers.
// scratch[4] : address of CLINT MTIMECMP register. // scratch[4] : address of CLINT MTIMECMP register.
@ -53,16 +70,13 @@ start()
scratch[4] = CLINT_MTIMECMP(id); scratch[4] = CLINT_MTIMECMP(id);
scratch[5] = interval; scratch[5] = interval;
w_mscratch((uint64)scratch); w_mscratch((uint64)scratch);
// set the machine-mode trap handler. // set the machine-mode trap handler.
w_mtvec((uint64)timervec); w_mtvec((uint64)timervec);
// enable machine-mode interrupts. // enable machine-mode interrupts.
w_mstatus(r_mstatus() | MSTATUS_MIE); w_mstatus(r_mstatus() | MSTATUS_MIE);
// enable machine-mode timer interrupts. // enable machine-mode timer interrupts.
w_mie(r_mie() | MIE_MTIE); w_mie(r_mie() | MIE_MTIE);
// keep each CPU's hartid in its tp register, for cpuid().
w_tp(id);
// switch to supervisor mode and jump to main().
asm volatile("mret");
} }