This commit is contained in:
Frans Kaashoek 2016-08-19 07:20:08 -04:00
parent 1fc87f367c
commit 7a77375d64

12
lapic.c
View file

@ -25,7 +25,7 @@
#define DEASSERT 0x00000000 #define DEASSERT 0x00000000
#define LEVEL 0x00008000 // Level triggered #define LEVEL 0x00008000 // Level triggered
#define BCAST 0x00080000 // Send to all APICs, including self. #define BCAST 0x00080000 // Send to all APICs, including self.
/#define BUSY 0x00001000 #define BUSY 0x00001000
#define FIXED 0x00000000 #define FIXED 0x00000000
#define ICRHI (0x0310/4) // Interrupt Command [63:32] #define ICRHI (0x0310/4) // Interrupt Command [63:32]
#define TIMER (0x0320/4) // Local Vector Table 0 (TIMER) #define TIMER (0x0320/4) // Local Vector Table 0 (TIMER)
@ -53,19 +53,19 @@ lapicw(int index, int value)
void void
lapicinit(void) lapicinit(void)
{ {
if(!lapic) if(!lapic)
return; return;
// Enable local APIC; set spurious interrupt vector. // Enable local APIC; set spurious interrupt vector.
lapicw(SVR, ENABLE | (T_IRQ0 + IRQ_SPURIOUS)); lapicw(SVR, ENABLE | (T_IRQ0 + IRQ_SPURIOUS));
// The timer repeatedly counts down at bus frequency // The timer repeatedly counts down at bus frequency
// from lapic[TICR] and then issues an interrupt. // from lapic[TICR] and then issues an interrupt.
// If xv6 cared more about precise timekeeping, // If xv6 cared more about precise timekeeping,
// TICR would be calibrated using an external time source. // TICR would be calibrated using an external time source.
lapicw(TDCR, X1); lapicw(TDCR, X1);
lapicw(TIMER, PERIODIC | (T_IRQ0 + IRQ_TIMER)); lapicw(TIMER, PERIODIC | (T_IRQ0 + IRQ_TIMER));
lapicw(TICR, 10000000); lapicw(TICR, 10000000);
// Disable logical interrupt lines. // Disable logical interrupt lines.
lapicw(LINT0, MASKED); lapicw(LINT0, MASKED);
@ -141,7 +141,7 @@ lapicstartap(uchar apicid, uint addr)
{ {
int i; int i;
ushort *wrv; ushort *wrv;
// "The BSP must initialize CMOS shutdown code to 0AH // "The BSP must initialize CMOS shutdown code to 0AH
// and the warm reset vector (DWORD based at 40:67) to point at // and the warm reset vector (DWORD based at 40:67) to point at
// the AP startup code prior to the [universal startup algorithm]." // the AP startup code prior to the [universal startup algorithm]."
@ -158,7 +158,7 @@ lapicstartap(uchar apicid, uint addr)
microdelay(200); microdelay(200);
lapicw(ICRLO, INIT | LEVEL); lapicw(ICRLO, INIT | LEVEL);
microdelay(100); // should be 10ms, but too slow in Bochs! microdelay(100); // should be 10ms, but too slow in Bochs!
// Send startup IPI (twice!) to enter code. // Send startup IPI (twice!) to enter code.
// Regular hardware is supposed to only accept a STARTUP // Regular hardware is supposed to only accept a STARTUP
// when it is in the halted state due to an INIT. So the second // when it is in the halted state due to an INIT. So the second