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1fc87f367c
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1 changed files with 6 additions and 6 deletions
12
lapic.c
12
lapic.c
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@ -25,7 +25,7 @@
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#define DEASSERT 0x00000000
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#define DEASSERT 0x00000000
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#define LEVEL 0x00008000 // Level triggered
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#define LEVEL 0x00008000 // Level triggered
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#define BCAST 0x00080000 // Send to all APICs, including self.
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#define BCAST 0x00080000 // Send to all APICs, including self.
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/#define BUSY 0x00001000
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#define BUSY 0x00001000
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#define FIXED 0x00000000
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#define FIXED 0x00000000
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#define ICRHI (0x0310/4) // Interrupt Command [63:32]
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#define ICRHI (0x0310/4) // Interrupt Command [63:32]
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#define TIMER (0x0320/4) // Local Vector Table 0 (TIMER)
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#define TIMER (0x0320/4) // Local Vector Table 0 (TIMER)
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@ -53,19 +53,19 @@ lapicw(int index, int value)
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void
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void
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lapicinit(void)
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lapicinit(void)
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{
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{
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if(!lapic)
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if(!lapic)
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return;
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return;
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// Enable local APIC; set spurious interrupt vector.
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// Enable local APIC; set spurious interrupt vector.
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lapicw(SVR, ENABLE | (T_IRQ0 + IRQ_SPURIOUS));
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lapicw(SVR, ENABLE | (T_IRQ0 + IRQ_SPURIOUS));
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// The timer repeatedly counts down at bus frequency
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// The timer repeatedly counts down at bus frequency
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// from lapic[TICR] and then issues an interrupt.
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// from lapic[TICR] and then issues an interrupt.
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// If xv6 cared more about precise timekeeping,
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// If xv6 cared more about precise timekeeping,
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// TICR would be calibrated using an external time source.
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// TICR would be calibrated using an external time source.
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lapicw(TDCR, X1);
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lapicw(TDCR, X1);
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lapicw(TIMER, PERIODIC | (T_IRQ0 + IRQ_TIMER));
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lapicw(TIMER, PERIODIC | (T_IRQ0 + IRQ_TIMER));
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lapicw(TICR, 10000000);
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lapicw(TICR, 10000000);
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// Disable logical interrupt lines.
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// Disable logical interrupt lines.
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lapicw(LINT0, MASKED);
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lapicw(LINT0, MASKED);
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@ -141,7 +141,7 @@ lapicstartap(uchar apicid, uint addr)
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{
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{
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int i;
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int i;
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ushort *wrv;
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ushort *wrv;
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// "The BSP must initialize CMOS shutdown code to 0AH
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// "The BSP must initialize CMOS shutdown code to 0AH
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// and the warm reset vector (DWORD based at 40:67) to point at
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// and the warm reset vector (DWORD based at 40:67) to point at
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// the AP startup code prior to the [universal startup algorithm]."
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// the AP startup code prior to the [universal startup algorithm]."
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@ -158,7 +158,7 @@ lapicstartap(uchar apicid, uint addr)
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microdelay(200);
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microdelay(200);
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lapicw(ICRLO, INIT | LEVEL);
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lapicw(ICRLO, INIT | LEVEL);
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microdelay(100); // should be 10ms, but too slow in Bochs!
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microdelay(100); // should be 10ms, but too slow in Bochs!
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// Send startup IPI (twice!) to enter code.
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// Send startup IPI (twice!) to enter code.
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// Regular hardware is supposed to only accept a STARTUP
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// Regular hardware is supposed to only accept a STARTUP
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// when it is in the halted state due to an INIT. So the second
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// when it is in the halted state due to an INIT. So the second
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