Change mycpu() to use %gs.
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821ee3fc99
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a7ca32e3a3
1
defs.h
1
defs.h
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@ -110,6 +110,7 @@ int fork(void);
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int growproc(int);
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int kill(int);
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struct cpu* mycpu(void);
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struct cpu* getmycpu(void);
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struct proc* myproc();
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void pinit(void);
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void procdump(void);
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2
main.c
2
main.c
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@ -45,6 +45,8 @@ main(uint64 mbmagic, uint64 mbaddr)
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return 0;
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}
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extern struct cpu* getmycpu();
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// Common CPU setup code.
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static void
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mpmain(void)
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16
proc.c
16
proc.c
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@ -37,16 +37,15 @@ cpuid() {
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// Must be called with interrupts disabled to avoid the caller being
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// rescheduled between reading lapicid and running through the loop.
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struct cpu*
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mycpu(void)
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getmycpu(void)
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{
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int apicid, i;
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if(readeflags()&FL_IF)
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panic("mycpu called with interrupts enabled\n");
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panic("getmycpu called with interrupts enabled\n");
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apicid = lapicid();
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// APIC IDs are not guaranteed to be contiguous. Maybe we should have
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// a reverse map, or reserve a register to store &cpus[i].
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// APIC IDs are not guaranteed to be contiguous.
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for (i = 0; i < ncpu; ++i) {
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if (cpus[i].apicid == apicid)
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return &cpus[i];
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@ -54,6 +53,15 @@ mycpu(void)
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panic("unknown apicid\n");
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}
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// Return this core's cpu struct using %gs. %gs points this core's struct
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// cpu. Offet 24 in struct cpu is cpu.
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struct cpu*
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mycpu(void) {
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struct cpu *c;
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asm volatile("mov %%gs:24, %0" : "=r" (c));
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return c;
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}
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// Disable interrupts so that we are not rescheduled
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// while reading proc from the cpu structure
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struct proc*
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1
proc.h
1
proc.h
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@ -3,6 +3,7 @@ struct cpu {
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uint64 syscallno; // Temporary used by sysentry
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uint64 usp; // Temporary used by sysentry
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struct proc *proc; // The process running on this cpu or null
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struct cpu *cpu; // XXX
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uchar apicid; // Local APIC ID
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struct context *scheduler; // swtch() here to enter scheduler
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struct taskstate ts; // Used by x86 to find stack for interrupt
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7
vm.c
7
vm.c
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@ -39,7 +39,8 @@ seginit(void)
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struct cpu *c;
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struct desctr dtr;
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c = mycpu();
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c = getmycpu();
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memmove(c->gdt, bootgdt, sizeof bootgdt);
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dtr.limit = sizeof(c->gdt)-1;
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dtr.base = (uint64) c->gdt;
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@ -54,10 +55,12 @@ seginit(void)
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writemsr(MSR_LSTAR, (uint64)&sysentry);
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writemsr(MSR_SFMASK, FL_TF | FL_IF);
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// Initialize cpu-local storage.
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// Initialize cpu-local storage so that each core can easily
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// find its struct cpu using %gs.
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writegs(SEG_KDATA);
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writemsr(MSR_GS_BASE, (uint64)c);
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writemsr(MSR_GS_KERNBASE, (uint64)c);
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c->cpu = c;
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}
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// Return the address of the PTE in page table pgdir
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