67702cf706
locking plan, which is a difficult to understand because ptable lock protects many invariants. This implementation has a bug: once in a while xv6 unlocks a proc lock that is locked by another core.
76 lines
1.1 KiB
C
76 lines
1.1 KiB
C
#include "types.h"
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#include "param.h"
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#include "memlayout.h"
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#include "riscv.h"
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#include "spinlock.h"
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#include "proc.h"
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#include "defs.h"
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//
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// qemu -machine virt has a 16550a UART
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// qemu/hw/riscv/virt.c
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// http://byterunner.com/16550.html
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//
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// caller should lock.
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//
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// address of one of the registers
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#define R(reg) ((volatile unsigned char *)(UART0 + reg))
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void
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uartinit(void)
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{
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// disable interrupts -- IER
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*R(1) = 0x00;
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// special mode to set baud rate
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*R(3) = 0x80;
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// LSB for baud rate of 38.4K
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*R(0) = 0x03;
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// MSB for baud rate of 38.4K
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*R(1) = 0x00;
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// leave set-baud mode,
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// and set word length to 8 bits, no parity.
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*R(3) = 0x03;
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// reset and enable FIFOs -- FCR.
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*R(2) = 0x07;
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// enable receive interrupts -- IER.
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*R(1) = 0x01;
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}
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void
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uartputc(int c)
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{
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// wait for Transmit Holding Empty to be set in LSR.
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while((*R(5) & (1 << 5)) == 0)
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;
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*R(0) = c;
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}
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int
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uartgetc(void)
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{
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if(*R(5) & 0x01){
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// input data is ready.
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return *R(0);
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} else {
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return -1;
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}
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}
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void
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uartintr(void)
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{
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while(1){
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int c = uartgetc();
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if(c == -1)
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break;
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consoleintr(c);
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}
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}
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