199 lines
3.4 KiB
C
199 lines
3.4 KiB
C
// Routines to let C code use special x86 instructions.
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#ifndef __ASSEMBLER__
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static inline uchar
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inb(ushort port)
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{
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uchar data;
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asm volatile("in %1,%0" : "=a" (data) : "d" (port));
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return data;
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}
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static inline void
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insl(int port, void *addr, int cnt)
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{
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asm volatile("cld; rep insl" :
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"=D" (addr), "=c" (cnt) :
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"d" (port), "0" (addr), "1" (cnt) :
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"memory", "cc");
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}
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static inline void
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outb(ushort port, uchar data)
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{
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asm volatile("out %0,%1" : : "a" (data), "d" (port));
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}
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static inline void
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outw(ushort port, ushort data)
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{
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asm volatile("out %0,%1" : : "a" (data), "d" (port));
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}
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static inline void
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outsl(int port, const void *addr, int cnt)
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{
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asm volatile("cld; rep outsl" :
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"=S" (addr), "=c" (cnt) :
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"d" (port), "0" (addr), "1" (cnt) :
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"cc");
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}
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static inline void
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stosb(void *addr, int data, int cnt)
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{
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asm volatile("cld; rep stosb" :
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"=D" (addr), "=c" (cnt) :
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"0" (addr), "1" (cnt), "a" (data) :
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"memory", "cc");
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}
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static inline void
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stosl(void *addr, int data, int cnt)
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{
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asm volatile("cld; rep stosl" :
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"=D" (addr), "=c" (cnt) :
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"0" (addr), "1" (cnt), "a" (data) :
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"memory", "cc");
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}
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static inline void
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lgdt(void *p)
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{
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asm volatile("lgdt (%0)" : : "r" (p) : "memory");
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}
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static inline void
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lidt(void *p)
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{
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asm volatile("lidt (%0)" : : "r" (p) : "memory");
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}
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static inline void
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ltr(ushort sel)
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{
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asm volatile("ltr %0" : : "r" (sel));
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}
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static inline uint64
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readeflags(void)
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{
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uint64 eflags;
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asm volatile("pushf; pop %0" : "=r" (eflags));
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return eflags;
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}
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static inline void
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loadgs(ushort v)
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{
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asm volatile("movw %0, %%gs" : : "r" (v));
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}
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static inline void
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cli(void)
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{
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asm volatile("cli");
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}
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static inline void
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sti(void)
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{
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asm volatile("sti");
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}
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static inline uint
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xchg(volatile uint *addr, uint newval)
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{
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uint result;
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// The + in "+m" denotes a read-modify-write operand.
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asm volatile("lock; xchgl %0, %1" :
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"+m" (*addr), "=a" (result) :
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"1" (newval) :
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"cc");
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return result;
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}
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static inline uint
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rcr2(void)
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{
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uint64 val;
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asm volatile("mov %%cr2,%0" : "=r" (val));
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return val;
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}
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static inline void
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lcr3(uint64 val)
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{
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asm volatile("mov %0,%%cr3" : : "r" (val));
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}
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static inline void
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writegs(uint16 v)
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{
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__asm volatile("movw %0, %%gs" : : "r" (v));
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}
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//PAGEBREAK: 36
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// Layout of the trap frame built on the stack by the
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// hardware and by trapasm.S, and passed to trap().
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struct trapframe {
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uint64 rax;
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uint64 rbx;
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uint64 rcx;
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uint64 rdx;
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uint64 rbp;
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uint64 rsi;
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uint64 rdi;
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uint64 r8;
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uint64 r9;
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uint64 r10;
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uint64 r11;
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uint64 r12;
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uint64 r13;
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uint64 r14;
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uint64 r15;
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uint64 trapno;
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uint64 err;
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uint64 rip;
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uint16 cs;
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uint16 padding[3];
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uint64 rflags;
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uint64 rsp;
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uint64 ss;
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}__attribute__((packed));
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struct sysframe {
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// arguments
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uint64 rdi;
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uint64 rsi;
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uint64 rdx;
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uint64 r10;
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uint64 r8;
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uint64 r9;
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// callee-saved registers
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uint64 r15;
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uint64 r14;
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uint64 r13;
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uint64 r12;
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uint64 rbx;
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uint64 rbp;
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// return value
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uint64 rax;
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// syscall registers
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uint64 r11; // eflags
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uint64 rcx; // rip
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uint64 rsp;
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}__attribute__((packed));
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#endif
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#define TF_CS 144 // offset in trapframe for saved cs
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