495 lines
12 KiB
HTML
495 lines
12 KiB
HTML
<html>
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<head>
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<title>L2</title>
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</head>
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<body>
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<h1>6.828 Lecture Notes: x86 and PC architecture</h1>
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<h2>Outline</h2>
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<ul>
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<li>PC architecture
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<li>x86 instruction set
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<li>gcc calling conventions
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<li>PC emulation
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</ul>
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<h2>PC architecture</h2>
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<ul>
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<li>A full PC has:
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<ul>
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<li>an x86 CPU with registers, execution unit, and memory management
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<li>CPU chip pins include address and data signals
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<li>memory
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<li>disk
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<li>keyboard
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<li>display
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<li>other resources: BIOS ROM, clock, ...
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</ul>
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<li>We will start with the original 16-bit 8086 CPU (1978)
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<li>CPU runs instructions:
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<pre>
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for(;;){
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run next instruction
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}
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</pre>
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<li>Needs work space: registers
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<ul>
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<li>four 16-bit data registers: AX, CX, DX, BX
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<li>each in two 8-bit halves, e.g. AH and AL
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<li>very fast, very few
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</ul>
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<li>More work space: memory
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<ul>
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<li>CPU sends out address on address lines (wires, one bit per wire)
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<li>Data comes back on data lines
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<li><i>or</i> data is written to data lines
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</ul>
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<li>Add address registers: pointers into memory
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<ul>
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<li>SP - stack pointer
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<li>BP - frame base pointer
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<li>SI - source index
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<li>DI - destination index
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</ul>
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<li>Instructions are in memory too!
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<ul>
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<li>IP - instruction pointer (PC on PDP-11, everything else)
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<li>increment after running each instruction
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<li>can be modified by CALL, RET, JMP, conditional jumps
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</ul>
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<li>Want conditional jumps
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<ul>
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<li>FLAGS - various condition codes
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<ul>
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<li>whether last arithmetic operation overflowed
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<li> ... was positive/negative
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<li> ... was [not] zero
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<li> ... carry/borrow on add/subtract
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<li> ... overflow
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<li> ... etc.
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<li>whether interrupts are enabled
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<li>direction of data copy instructions
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</ul>
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<li>JP, JN, J[N]Z, J[N]C, J[N]O ...
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</ul>
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<li>Still not interesting - need I/O to interact with outside world
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<ul>
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<li>Original PC architecture: use dedicated <i>I/O space</i>
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<ul>
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<li>Works same as memory accesses but set I/O signal
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<li>Only 1024 I/O addresses
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<li>Example: write a byte to line printer:
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<pre>
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#define DATA_PORT 0x378
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#define STATUS_PORT 0x379
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#define BUSY 0x80
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#define CONTROL_PORT 0x37A
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#define STROBE 0x01
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void
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lpt_putc(int c)
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{
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/* wait for printer to consume previous byte */
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while((inb(STATUS_PORT) & BUSY) == 0)
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;
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/* put the byte on the parallel lines */
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outb(DATA_PORT, c);
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/* tell the printer to look at the data */
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outb(CONTROL_PORT, STROBE);
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outb(CONTROL_PORT, 0);
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}
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<pre>
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</ul>
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<li>Memory-Mapped I/O
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<ul>
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<li>Use normal physical memory addresses
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<ul>
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<li>Gets around limited size of I/O address space
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<li>No need for special instructions
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<li>System controller routes to appropriate device
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</ul>
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<li>Works like ``magic'' memory:
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<ul>
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<li> <i>Addressed</i> and <i>accessed</i> like memory,
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but ...
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<li> ... does not <i>behave</i> like memory!
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<li> Reads and writes can have ``side effects''
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<li> Read results can change due to external events
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</ul>
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</ul>
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</ul>
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<li>What if we want to use more than 2^16 bytes of memory?
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<ul>
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<li>8086 has 20-bit physical addresses, can have 1 Meg RAM
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<li>each segment is a 2^16 byte window into physical memory
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<li>virtual to physical translation: pa = va + seg*16
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<li>the segment is usually implicit, from a segment register
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<li>CS - code segment (for fetches via IP)
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<li>SS - stack segment (for load/store via SP and BP)
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<li>DS - data segment (for load/store via other registers)
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<li>ES - another data segment (destination for string operations)
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<li>tricky: can't use the 16-bit address of a stack variable as a pointer
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<li>but a <i>far pointer</i> includes full segment:offset (16 + 16 bits)
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</ul>
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<li>But 8086's 16-bit addresses and data were still painfully small
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<ul>
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<li>80386 added support for 32-bit data and addresses (1985)
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<li>boots in 16-bit mode, boot.S switches to 32-bit mode
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<li>registers are 32 bits wide, called EAX rather than AX
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<li>operands and addresses are also 32 bits, e.g. ADD does 32-bit arithmetic
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<li>prefix 0x66 gets you 16-bit mode: MOVW is really 0x66 MOVW
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<li>the .code32 in boot.S tells assembler to generate 0x66 for e.g. MOVW
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<li>80386 also changed segments and added paged memory...
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</ul>
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</ul>
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<h2>x86 Physical Memory Map</h2>
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<ul>
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<li>The physical address space mostly looks like ordinary RAM
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<li>Except some low-memory addresses actually refer to other things
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<li>Writes to VGA memory appear on the screen
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<li>Reset or power-on jumps to ROM at 0x000ffff0
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</ul>
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<pre>
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+------------------+ <- 0xFFFFFFFF (4GB)
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| 32-bit |
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| memory mapped |
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| devices |
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/\/\/\/\/\/\/\/\/\/\
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/\/\/\/\/\/\/\/\/\/\
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| Unused |
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+------------------+ <- depends on amount of RAM
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| Extended Memory |
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+------------------+ <- 0x00100000 (1MB)
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| BIOS ROM |
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+------------------+ <- 0x000F0000 (960KB)
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| 16-bit devices, |
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| expansion ROMs |
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+------------------+ <- 0x000C0000 (768KB)
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| VGA Display |
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+------------------+ <- 0x000A0000 (640KB)
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| Low Memory |
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+------------------+ <- 0x00000000
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</pre>
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<h2>x86 Instruction Set</h2>
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<ul>
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<li>Two-operand instruction set
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<ul>
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<li>Intel syntax: <tt>op dst, src</tt>
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<li>AT&T (gcc/gas) syntax: <tt>op src, dst</tt>
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<ul>
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<li>uses b, w, l suffix on instructions to specify size of operands
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</ul>
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<li>Operands are registers, constant, memory via register, memory via constant
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<li> Examples:
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<table cellspacing=5>
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<tr><td><u>AT&T syntax</u> <td><u>"C"-ish equivalent</u>
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<tr><td>movl %eax, %edx <td>edx = eax; <td><i>register mode</i>
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<tr><td>movl $0x123, %edx <td>edx = 0x123; <td><i>immediate</i>
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<tr><td>movl 0x123, %edx <td>edx = *(int32_t*)0x123; <td><i>direct</i>
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<tr><td>movl (%ebx), %edx <td>edx = *(int32_t*)ebx; <td><i>indirect</i>
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<tr><td>movl 4(%ebx), %edx <td>edx = *(int32_t*)(ebx+4); <td><i>displaced</i>
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</table>
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</ul>
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<li>Instruction classes
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<ul>
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<li>data movement: MOV, PUSH, POP, ...
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<li>arithmetic: TEST, SHL, ADD, AND, ...
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<li>i/o: IN, OUT, ...
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<li>control: JMP, JZ, JNZ, CALL, RET
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<li>string: REP MOVSB, ...
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<li>system: IRET, INT
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</ul>
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<li>Intel architecture manual Volume 2 is <i>the</i> reference
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</ul>
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<h2>gcc x86 calling conventions</h2>
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<ul>
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<li>x86 dictates that stack grows down:
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<table cellspacing=5>
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<tr><td><u>Example instruction</u> <td><u>What it does</u>
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<tr><td>pushl %eax
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<td>
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subl $4, %esp <br>
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movl %eax, (%esp) <br>
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<tr><td>popl %eax
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<td>
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movl (%esp), %eax <br>
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addl $4, %esp <br>
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<tr><td>call $0x12345
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<td>
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pushl %eip <sup>(*)</sup> <br>
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movl $0x12345, %eip <sup>(*)</sup> <br>
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<tr><td>ret
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<td>
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popl %eip <sup>(*)</sup>
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</table>
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(*) <i>Not real instructions</i>
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<li>GCC dictates how the stack is used.
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Contract between caller and callee on x86:
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<ul>
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<li>after call instruction:
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<ul>
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<li>%eip points at first instruction of function
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<li>%esp+4 points at first argument
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<li>%esp points at return address
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</ul>
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<li>after ret instruction:
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<ul>
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<li>%eip contains return address
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<li>%esp points at arguments pushed by caller
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<li>called function may have trashed arguments
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<li>%eax contains return value
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(or trash if function is <tt>void</tt>)
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<li>%ecx, %edx may be trashed
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<li>%ebp, %ebx, %esi, %edi must contain contents from time of <tt>call</tt>
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</ul>
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<li>Terminology:
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<ul>
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<li>%eax, %ecx, %edx are "caller save" registers
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<li>%ebp, %ebx, %esi, %edi are "callee save" registers
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</ul>
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</ul>
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<li>Functions can do anything that doesn't violate contract.
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By convention, GCC does more:
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<ul>
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<li>each function has a stack frame marked by %ebp, %esp
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<pre>
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+------------+ |
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| arg 2 | \
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+------------+ >- previous function's stack frame
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| arg 1 | /
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+------------+ |
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| ret %eip | /
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+============+
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| saved %ebp | \
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%ebp-> +------------+ |
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| | |
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| local | \
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| variables, | >- current function's stack frame
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| etc. | /
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%esp-> +------------+ /
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</pre>
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<li>%esp can move to make stack frame bigger, smaller
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<li>%ebp points at saved %ebp from previous function,
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chain to walk stack
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<li>function prologue:
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<pre>
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pushl %ebp
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movl %esp, %ebp
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</pre>
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<li>function epilogue:
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<pre>
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movl %ebp, %esp
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popl %ebp
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</pre>
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or
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<pre>
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leave
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</pre>
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</ul>
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<li>Big example:
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<ul>
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<li>C code
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<pre>
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int main(void) { return f(8)+1; }
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int f(int x) { return g(x); }
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int g(int x) { return x+3; }
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</pre>
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<li>assembler
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<pre>
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_main:
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<i>prologue</i>
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pushl %ebp
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movl %esp, %ebp
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<i>body</i>
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pushl $8
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call _f
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addl $1, %eax
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<i>epilogue</i>
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movl %ebp, %esp
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popl %ebp
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ret
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_f:
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<i>prologue</i>
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pushl %ebp
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movl %esp, %ebp
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<i>body</i>
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pushl 8(%esp)
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call _g
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<i>epilogue</i>
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movl %ebp, %esp
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popl %ebp
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ret
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_g:
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<i>prologue</i>
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pushl %ebp
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movl %esp, %ebp
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<i>save %ebx</i>
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pushl %ebx
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<i>body</i>
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movl 8(%ebp), %ebx
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addl $3, %ebx
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movl %ebx, %eax
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<i>restore %ebx</i>
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popl %ebx
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<i>epilogue</i>
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movl %ebp, %esp
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popl %ebp
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ret
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</pre>
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</ul>
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<li>Super-small <tt>_g</tt>:
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<pre>
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_g:
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movl 4(%esp), %eax
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addl $3, %eax
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ret
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</pre>
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<li>Compiling, linking, loading:
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<ul>
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<li> <i>Compiler</i> takes C source code (ASCII text),
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produces assembly language (also ASCII text)
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<li> <i>Assembler</i> takes assembly language (ASCII text),
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produces <tt>.o</tt> file (binary, machine-readable!)
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<li> <i>Linker</i> takse multiple '<tt>.o</tt>'s,
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produces a single <i>program image</i> (binary)
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<li> <i>Loader</i> loads the program image into memory
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at run-time and starts it executing
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</ul>
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</ul>
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<h2>PC emulation</h2>
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<ul>
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<li> Emulator like Bochs works by
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<ul>
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<li> doing exactly what a real PC would do,
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<li> only implemented in software rather than hardware!
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</ul>
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<li> Runs as a normal process in a "host" operating system (e.g., Linux)
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<li> Uses normal process storage to hold emulated hardware state:
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e.g.,
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<ul>
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<li> Hold emulated CPU registers in global variables
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<pre>
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int32_t regs[8];
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#define REG_EAX 1;
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#define REG_EBX 2;
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#define REG_ECX 3;
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...
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int32_t eip;
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int16_t segregs[4];
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...
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</pre>
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<li> <tt>malloc</tt> a big chunk of (virtual) process memory
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to hold emulated PC's (physical) memory
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</ul>
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<li> Execute instructions by simulating them in a loop:
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<pre>
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for (;;) {
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read_instruction();
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switch (decode_instruction_opcode()) {
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case OPCODE_ADD:
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int src = decode_src_reg();
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int dst = decode_dst_reg();
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regs[dst] = regs[dst] + regs[src];
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break;
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case OPCODE_SUB:
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int src = decode_src_reg();
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int dst = decode_dst_reg();
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regs[dst] = regs[dst] - regs[src];
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break;
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...
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}
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eip += instruction_length;
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}
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</pre>
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<li> Simulate PC's physical memory map
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by decoding emulated "physical" addresses just like a PC would:
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<pre>
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#define KB 1024
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#define MB 1024*1024
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#define LOW_MEMORY 640*KB
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#define EXT_MEMORY 10*MB
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uint8_t low_mem[LOW_MEMORY];
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uint8_t ext_mem[EXT_MEMORY];
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uint8_t bios_rom[64*KB];
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uint8_t read_byte(uint32_t phys_addr) {
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if (phys_addr < LOW_MEMORY)
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return low_mem[phys_addr];
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else if (phys_addr >= 960*KB && phys_addr < 1*MB)
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return rom_bios[phys_addr - 960*KB];
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else if (phys_addr >= 1*MB && phys_addr < 1*MB+EXT_MEMORY) {
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return ext_mem[phys_addr-1*MB];
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else ...
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}
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void write_byte(uint32_t phys_addr, uint8_t val) {
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if (phys_addr < LOW_MEMORY)
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low_mem[phys_addr] = val;
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else if (phys_addr >= 960*KB && phys_addr < 1*MB)
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; /* ignore attempted write to ROM! */
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else if (phys_addr >= 1*MB && phys_addr < 1*MB+EXT_MEMORY) {
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ext_mem[phys_addr-1*MB] = val;
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else ...
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}
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</pre>
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<li> Simulate I/O devices, etc., by detecting accesses to
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"special" memory and I/O space and emulating the correct behavior:
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e.g.,
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<ul>
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<li> Reads/writes to emulated hard disk
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transformed into reads/writes of a file on the host system
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<li> Writes to emulated VGA display hardware
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transformed into drawing into an X window
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<li> Reads from emulated PC keyboard
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transformed into reads from X input event queue
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</ul>
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</ul>
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