8a8be1b8c3
fix acquire() to cli() *before* incrementing nlock make T_SYSCALL a trap gate, not an interrupt gate sadly, various crashes if you hold down a keyboard key...
369 lines
8.2 KiB
C
369 lines
8.2 KiB
C
static __inline void breakpoint(void) __attribute__((always_inline));
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static __inline uchar inb(int port) __attribute__((always_inline));
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static __inline void insb(int port, void *addr, int cnt) __attribute__((always_inline));
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static __inline ushort inw(int port) __attribute__((always_inline));
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static __inline void insw(int port, void *addr, int cnt) __attribute__((always_inline));
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static __inline uint inl(int port) __attribute__((always_inline));
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static __inline void insl(int port, void *addr, int cnt) __attribute__((always_inline));
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static __inline void outb(int port, uchar data) __attribute__((always_inline));
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static __inline void outsb(int port, const void *addr, int cnt) __attribute__((always_inline));
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static __inline void outw(int port, ushort data) __attribute__((always_inline));
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static __inline void outsw(int port, const void *addr, int cnt) __attribute__((always_inline));
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static __inline void outsl(int port, const void *addr, int cnt) __attribute__((always_inline));
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static __inline void outl(int port, uint data) __attribute__((always_inline));
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static __inline void invlpg(void *addr) __attribute__((always_inline));
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struct segdesc;
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static __inline void lgdt(struct segdesc *p, int) __attribute__((always_inline));
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struct gatedesc;
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static __inline void lidt(struct gatedesc *p, int) __attribute__((always_inline));
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static __inline void lldt(ushort sel) __attribute__((always_inline));
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static __inline void ltr(ushort sel) __attribute__((always_inline));
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static __inline void lcr0(uint val) __attribute__((always_inline));
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static __inline uint rcr0(void) __attribute__((always_inline));
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static __inline uint rcr2(void) __attribute__((always_inline));
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static __inline void lcr3(uint val) __attribute__((always_inline));
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static __inline uint rcr3(void) __attribute__((always_inline));
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static __inline void lcr4(uint val) __attribute__((always_inline));
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static __inline uint rcr4(void) __attribute__((always_inline));
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static __inline void tlbflush(void) __attribute__((always_inline));
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static __inline uint read_eflags(void) __attribute__((always_inline));
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static __inline void write_eflags(uint eflags) __attribute__((always_inline));
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static __inline uint read_ebp(void) __attribute__((always_inline));
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static __inline uint read_esp(void) __attribute__((always_inline));
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static __inline void cpuid(uint info, uint *eaxp, uint *ebxp, uint *ecxp, uint *edxp);
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static __inline void cli(void) __attribute__((always_inline));
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static __inline void sti(void) __attribute__((always_inline));
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static __inline void
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breakpoint(void)
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{
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__asm __volatile("int3");
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}
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static __inline uchar
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inb(int port)
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{
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uchar data;
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__asm __volatile("inb %w1,%0" : "=a" (data) : "d" (port));
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return data;
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}
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static __inline void
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insb(int port, void *addr, int cnt)
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{
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__asm __volatile("cld\n\trepne\n\tinsb" :
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"=D" (addr), "=c" (cnt) :
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"d" (port), "0" (addr), "1" (cnt) :
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"memory", "cc");
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}
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static __inline ushort
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inw(int port)
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{
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ushort data;
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__asm __volatile("inw %w1,%0" : "=a" (data) : "d" (port));
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return data;
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}
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static __inline void
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insw(int port, void *addr, int cnt)
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{
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__asm __volatile("cld\n\trepne\n\tinsw" :
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"=D" (addr), "=c" (cnt) :
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"d" (port), "0" (addr), "1" (cnt) :
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"memory", "cc");
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}
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static __inline uint
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inl(int port)
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{
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uint data;
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__asm __volatile("inl %w1,%0" : "=a" (data) : "d" (port));
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return data;
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}
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static __inline void
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insl(int port, void *addr, int cnt)
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{
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__asm __volatile("cld\n\trepne\n\tinsl" :
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"=D" (addr), "=c" (cnt) :
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"d" (port), "0" (addr), "1" (cnt) :
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"memory", "cc");
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}
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static __inline void
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outb(int port, uchar data)
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{
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__asm __volatile("outb %0,%w1" : : "a" (data), "d" (port));
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}
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static __inline void
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outsb(int port, const void *addr, int cnt)
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{
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__asm __volatile("cld\n\trepne\n\toutsb" :
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"=S" (addr), "=c" (cnt) :
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"d" (port), "0" (addr), "1" (cnt) :
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"cc");
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}
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static __inline void
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outw(int port, ushort data)
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{
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__asm __volatile("outw %0,%w1" : : "a" (data), "d" (port));
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}
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static __inline void
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outsw(int port, const void *addr, int cnt)
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{
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__asm __volatile("cld\n\trepne\n\toutsw" :
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"=S" (addr), "=c" (cnt) :
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"d" (port), "0" (addr), "1" (cnt) :
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"cc");
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}
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static __inline void
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outsl(int port, const void *addr, int cnt)
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{
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__asm __volatile("cld\n\trepne\n\toutsl" :
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"=S" (addr), "=c" (cnt) :
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"d" (port), "0" (addr), "1" (cnt) :
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"cc");
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}
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static __inline void
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outl(int port, uint data)
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{
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__asm __volatile("outl %0,%w1" : : "a" (data), "d" (port));
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}
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static __inline void
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invlpg(void *addr)
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{
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__asm __volatile("invlpg (%0)" : : "r" (addr) : "memory");
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}
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static __inline void
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lgdt(struct segdesc *p, int size)
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{
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volatile ushort pd[3];
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pd[0] = size-1;
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pd[1] = (uint)p;
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pd[2] = (uint)p >> 16;
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asm volatile("lgdt (%0)" : : "g" (pd));
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}
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static __inline void
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lidt(struct gatedesc *p, int size)
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{
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volatile ushort pd[3];
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pd[0] = size-1;
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pd[1] = (uint)p;
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pd[2] = (uint)p >> 16;
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asm volatile("lidt (%0)" : : "g" (pd));
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}
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static __inline void
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lldt(ushort sel)
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{
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__asm __volatile("lldt %0" : : "r" (sel));
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}
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static __inline void
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ltr(ushort sel)
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{
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__asm __volatile("ltr %0" : : "r" (sel));
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}
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static __inline void
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lcr0(uint val)
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{
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__asm __volatile("movl %0,%%cr0" : : "r" (val));
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}
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static __inline uint
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rcr0(void)
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{
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uint val;
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__asm __volatile("movl %%cr0,%0" : "=r" (val));
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return val;
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}
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static __inline uint
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rcr2(void)
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{
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uint val;
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__asm __volatile("movl %%cr2,%0" : "=r" (val));
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return val;
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}
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static __inline void
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lcr3(uint val)
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{
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__asm __volatile("movl %0,%%cr3" : : "r" (val));
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}
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static __inline uint
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rcr3(void)
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{
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uint val;
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__asm __volatile("movl %%cr3,%0" : "=r" (val));
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return val;
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}
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static __inline void
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lcr4(uint val)
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{
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__asm __volatile("movl %0,%%cr4" : : "r" (val));
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}
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static __inline uint
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rcr4(void)
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{
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uint cr4;
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__asm __volatile("movl %%cr4,%0" : "=r" (cr4));
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return cr4;
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}
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static __inline void
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tlbflush(void)
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{
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uint cr3;
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__asm __volatile("movl %%cr3,%0" : "=r" (cr3));
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__asm __volatile("movl %0,%%cr3" : : "r" (cr3));
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}
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static __inline uint
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read_eflags(void)
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{
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uint eflags;
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__asm __volatile("pushfl; popl %0" : "=r" (eflags));
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return eflags;
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}
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static __inline void
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write_eflags(uint eflags)
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{
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__asm __volatile("pushl %0; popfl" : : "r" (eflags));
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}
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static __inline uint
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read_ebp(void)
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{
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uint ebp;
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__asm __volatile("movl %%ebp,%0" : "=r" (ebp));
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return ebp;
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}
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static __inline uint
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read_esp(void)
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{
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uint esp;
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__asm __volatile("movl %%esp,%0" : "=r" (esp));
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return esp;
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}
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static __inline uint
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read_esi(void)
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{
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uint esi;
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__asm __volatile("movl %%esi,%0" : "=r" (esi));
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return esi;
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}
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static __inline uint
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read_edi(void)
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{
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uint edi;
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__asm __volatile("movl %%edi,%0" : "=r" (edi));
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return edi;
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}
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static __inline uint
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read_ebx(void)
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{
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uint ebx;
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__asm __volatile("movl %%ebx,%0" : "=r" (ebx));
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return ebx;
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}
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static __inline void
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cpuid(uint info, uint *eaxp, uint *ebxp, uint *ecxp, uint *edxp)
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{
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uint eax, ebx, ecx, edx;
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asm volatile("cpuid"
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: "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
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: "a" (info));
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if (eaxp)
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*eaxp = eax;
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if (ebxp)
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*ebxp = ebx;
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if (ecxp)
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*ecxp = ecx;
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if (edxp)
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*edxp = edx;
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}
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static __inline uint
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cmpxchg(uint oldval, uint newval, volatile uint* lock_addr)
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{
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uint result;
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__asm__ __volatile__(
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"lock; cmpxchgl %2, %0"
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:"+m" (*lock_addr), "=a" (result) : "r"(newval), "1"(oldval) : "cc"
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);
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return result;
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}
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static __inline void
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cli(void)
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{
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__asm__ volatile("cli");
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}
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static __inline void
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sti(void)
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{
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__asm__ volatile("sti");
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}
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struct trapframe {
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/* registers as pushed by pusha */
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uint edi;
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uint esi;
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uint ebp;
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uint oesp; /* Useless */
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uint ebx;
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uint edx;
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uint ecx;
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uint eax;
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/* rest of trap frame */
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ushort es;
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ushort padding1;
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ushort ds;
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ushort padding2;
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uint trapno;
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/* below here defined by x86 hardware */
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uint err;
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uint eip;
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ushort cs;
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ushort padding3;
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uint eflags;
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/* below here only when crossing rings, such as from user to kernel */
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uint esp;
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ushort ss;
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ushort padding4;
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};
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#define MAX_IRQS 16 // Number of IRQs
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#define IRQ_OFFSET 32 // IRQ 0 corresponds to int IRQ_OFFSET
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#define IRQ_KBD 1
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#define IRQ_IDE 14
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#define IRQ_ERROR 19
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#define IRQ_SPURIOUS 31
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