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Rename our pseudo-opcode 'la' to 'li32'.

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GNU as has "la %r4,8(%r3)" as an alias for "addi %r4,%r3,8", meaning
to load the address of the thing at 8(%r3).  Our 'la', now 'li32',
makes an addis/ori pair to load an immediate 32-bit value.  For
example, "li32 r4,23456789" loads a big number.
This commit is contained in:
George Koehler 2016-09-18 17:03:23 -04:00
parent 9db305b338
commit 5b69777647
10 changed files with 16 additions and 16 deletions
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2
mach/powerpc/as/mach2.c
View file

@ -80,7 +80,7 @@
%token <y_word> OP_TO_RA_RB
%token <y_word> OP_TO_RA_SI
%token <y_word> OP_LA
%token <y_word> OP_LI32
/* Other token types */

2
mach/powerpc/as/mach3.c
View file

@ -98,7 +98,7 @@
/* Special instructions */
0, OP_LA, 0, "la",
0, OP_LI32, 0, "li32",
/* Branch processor instructions (page 20) */

4
mach/powerpc/as/mach4.c
View file

@ -58,7 +58,7 @@ operation
| OP_LEV u7 { emit4($1 | ($2<<5)); }
| OP_LIA lia { emit4($1 | $2); }
| OP_LIL lil { emit4($1 | $2); }
| OP_LA la /* emitted in subrule */
| OP_LI32 li32 /* emitted in subrule */
;
c
@ -193,7 +193,7 @@ bda
}
;
la
li32
: GPR ',' expr
{
newrelo($3.typ, RELOPPC | FIXUPFLAGS);

2
mach/powerpc/libem/aar4.s
View file

@ -20,7 +20,7 @@
.define .aar4
.aar4:
la r0, .trap_earray
li32 r0, .trap_earray
mtspr ctr, r0 ! load CTR with trap address
lwz r0, 0(r3)

6
mach/powerpc/libem/cfu8.s
View file

@ -13,15 +13,15 @@
.define .cfu8
.cfu8:
la r3, .fd_00000000
li32 r3, .fd_00000000
lfd f0, 0(r3) ! f0 = 0.0
lfd f1, 0(sp) ! value to be converted
la r3, .fd_FFFFFFFF
li32 r3, .fd_FFFFFFFF
lfd f3, 0(r3) ! f3 = 0xFFFFFFFF
la r3, .fd_80000000
li32 r3, .fd_80000000
lfd f4, 0(r3) ! f4 = 0x80000000
fsel f2, f1, f1, f0

2
mach/powerpc/libem/cif8.s
View file

@ -24,7 +24,7 @@
lfd f0, 0(sp) ! load value
la r3, pivot
li32 r3, pivot
lfd f1, 0(r3) ! load pivot value
fsub f0, f0, f1 ! adjust

2
mach/powerpc/libem/cuf8.s
View file

@ -20,7 +20,7 @@
lfd f0, 0(sp) ! load value
la r3, pivot
li32 r3, pivot
lfd f1, 0(r3) ! load pivot value
fsub f0, f0, f1 ! adjust

4
mach/powerpc/ncg/table
View file

@ -293,7 +293,6 @@ INSTRUCTIONS
fsubs FSREG:wo, FSREG:ro, FSREG:ro.
fmr FPR:wo, FPR:ro.
fmr FSREG:wo, FSREG:ro.
la GPRI:wo, LABEL:ro.
lbzx GPRI:wo, GPR:ro, GPR:ro.
lbz GPRI:wo, GPRINDIRECT+GPRINDIRECTLO:ro.
lfd FPR:wo, GPRINDIRECT+GPRINDIRECTLO:ro.
@ -306,6 +305,7 @@ INSTRUCTIONS
lhax GPRI:wo, GPR:ro, GPR:ro.
lha GPRI:wo, GPRINDIRECT+GPRINDIRECTLO:ro.
lhz GPRI:wo, GPRINDIRECT+GPRINDIRECTLO:ro.
li32 GPRI:wo, LABEL:ro.
lwzu GPRI:wo, GPRINDIRECT+GPRINDIRECTLO:ro.
lwzx GPRI:wo, GPR:ro, GPR:ro.
lwz GPRI:wo, GPRINDIRECT+GPRINDIRECTLO:ro.
@ -385,7 +385,7 @@ MOVES
from LABEL to GPR
gen
COMMENT("move LABEL->GPR")
la %2, {LABEL, %1.adr}
li32 %2, {LABEL, %1.adr}
/* Sign extension */

2
plat/linuxppc/libsys/_syscall.s
View file

@ -42,7 +42,7 @@ __syscall:
bc IFTRUE, GT, 2f
3:
la r4, _errno
li32 r4, _errno
stw r3, 0(r4)
addi r3, r0, -1
bclr ALWAYS, 0, 0

6
plat/linuxppc/libsys/trap.s
View file

@ -65,13 +65,13 @@ EUNIMPL = 63 ! unimplemented em-instruction called
addi r4, r0, 1
rlwnm r4, r4, r3, 0, 31 ! calculate trap bit
la r5, .ignmask
li32 r5, .ignmask
lwz r5, 0(r5) ! load ignore mask
and. r4, r4, r5 ! compare
bclr IFFALSE, EQ, 0 ! return if non-zero
1:
la r4, .trppc
li32 r4, .trppc
lwz r5, 0(r4) ! load user trap routine
or. r5, r5, r5 ! test
bc IFTRUE, EQ, fatal ! if no user trap routine, bail out
@ -92,7 +92,7 @@ EUNIMPL = 63 ! unimplemented em-instruction called
fatal:
addi r3, r0, 1
la r4, message
li32 r4, message
addi r5, r0, 6
addi r0, r0, 4 ! write()
sc 0