a minor improvement

This commit is contained in:
ceriel 1988-02-17 15:41:27 +00:00
parent d04dce377a
commit 83d7633503
4 changed files with 32 additions and 0 deletions

View file

@ -737,6 +737,14 @@ pat lil inreg($1)==reg_any
yields {indirect4, %a}
pat stl inreg($1)==reg_any
with exact memory1-const
kills regvar($1, reg_any), use_index %xreg==regvar($1, reg_any)
gen clr_l {LOCAL, $1}
move_b %1, {dreg1, regvar($1,reg_any)}
with exact memory2-const
kills regvar($1, reg_any), use_index %xreg==regvar($1, reg_any)
gen clr_l {LOCAL, $1}
move_w %1, {dreg2, regvar($1,reg_any)}
with any4
kills regvar($1, reg_any), use_index %xreg==regvar($1, reg_any)
gen move %1, {LOCAL, $1}

View file

@ -737,6 +737,14 @@ pat lil inreg($1)==reg_any
yields {indirect4, %a}
pat stl inreg($1)==reg_any
with exact memory1-const
kills regvar($1, reg_any), use_index %xreg==regvar($1, reg_any)
gen clr_l {LOCAL, $1}
move_b %1, {dreg1, regvar($1,reg_any)}
with exact memory2-const
kills regvar($1, reg_any), use_index %xreg==regvar($1, reg_any)
gen clr_l {LOCAL, $1}
move_w %1, {dreg2, regvar($1,reg_any)}
with any4
kills regvar($1, reg_any), use_index %xreg==regvar($1, reg_any)
gen move %1, {LOCAL, $1}

View file

@ -737,6 +737,14 @@ pat lil inreg($1)==reg_any
yields {indirect4, %a}
pat stl inreg($1)==reg_any
with exact memory1-const
kills regvar($1, reg_any), use_index %xreg==regvar($1, reg_any)
gen clr_l {LOCAL, $1}
move_b %1, {dreg1, regvar($1,reg_any)}
with exact memory2-const
kills regvar($1, reg_any), use_index %xreg==regvar($1, reg_any)
gen clr_l {LOCAL, $1}
move_w %1, {dreg2, regvar($1,reg_any)}
with any4
kills regvar($1, reg_any), use_index %xreg==regvar($1, reg_any)
gen move %1, {LOCAL, $1}

View file

@ -737,6 +737,14 @@ pat lil inreg($1)==reg_any
yields {indirect4, %a}
pat stl inreg($1)==reg_any
with exact memory1-const
kills regvar($1, reg_any), use_index %xreg==regvar($1, reg_any)
gen clr_l {LOCAL, $1}
move_b %1, {dreg1, regvar($1,reg_any)}
with exact memory2-const
kills regvar($1, reg_any), use_index %xreg==regvar($1, reg_any)
gen clr_l {LOCAL, $1}
move_w %1, {dreg2, regvar($1,reg_any)}
with any4
kills regvar($1, reg_any), use_index %xreg==regvar($1, reg_any)
gen move %1, {LOCAL, $1}