Commit graph

15 commits

Author SHA1 Message Date
David Given e7e29d34ff Add a test (currently failing) to check that Pascal char sets can store all 256
possible values. Add the PowerPC ncg and mcg backend support to let the test
actually run, including modifying a bunch of PowrePC libem functions so that
they can be called from both ncg and mcg.
2017-01-15 22:28:14 +01:00
George Koehler 8605a2fcfc Add Modula-2 set operations to PowerPC ncg.
This provides and, ior, xor, com, zer, set, cms when defined($1) and
ior, set when !defined($1).  I don't provide the other operations
!defined($1) because our Modula-2 compiler hasn't used them.

I wrote a Modula-2 example in
https://gist.github.com/kernigh/add79662bb3c63ffb7c46d01dc8ae788

Put a dummy comment in mach/powerpc/libem/build.lua so git checkout
will touch that file.  Without the touch, the build system doesn't see
the new *.s files.
2016-12-10 12:23:07 -05:00
David Given 55e24e1f24 inn was assuming that bitfields were arrays of bytes, when actually they're
arrays of words (which makes the LSB move on big-endian systems).
2016-12-06 21:45:20 +01:00
David Given 953c08839f inn works now; add a helper for it. 2016-11-20 12:53:44 +01:00
David Given d31bc6a3f9 Made csa and csb work with mcg; adjust the libem functions and the
corresponding invocation in the ncg table so the same helpers can be used for
both mcg and ncg. Add a new IR opcode, FARJUMP, which jumps to a helper
function but saves volatile registers.
2016-11-19 10:55:41 +01:00
David Given 8c3670483f Get top working with the PowerPC; use it to eliminate useless branches and
moves.
2016-10-29 23:37:11 +02:00
George Koehler f33b30ed3c Rewrite .fif8 to avoid powerpc64 fctid
This fixes the SIGILL (illegal instruction) in startrek when firing
phasers.  The 32-bit processors in my PowerPC Mac and in QEMU don't
have fctid, a 64-bit instruction.

I got the idea from mach/proto/fp/fif8.c to extract the exponent,
clear some bits to get an integer, then subtract the integer from
the original value to get the fraction.
2016-10-17 00:39:59 -04:00
George Koehler 6ae415d48b Rewrite fef 8 in powerpc assembly.
In EM, fef splits a float into exponent and fraction.  The old C code,
given an infinite float, got stuck in an infinite loop.  The new
assembly code doesn't loop; it extracts the IEEE exponent.
2016-09-29 15:52:54 -04:00
George Koehler 5b69777647 Rename our pseudo-opcode 'la' to 'li32'.
GNU as has "la %r4,8(%r3)" as an alias for "addi %r4,%r3,8", meaning
to load the address of the thing at 8(%r3).  Our 'la', now 'li32',
makes an addis/ori pair to load an immediate 32-bit value.  For
example, "li32 r4,23456789" loads a big number.
2016-09-18 17:03:23 -04:00
George Koehler 03b067e1d5 Add the missing .lar4 and .sar4 for powerpc.
Inspired by the sparc code (mach/sparc/libem/lar.s).  My powerpc code
might still have bugs, but it's enough for examples/hilo.mod to work.

May need to 'make clean' or touch a build.lua file, so ackbuilder can
notice the new lar4.s and sar4.s files and build them.
2016-09-17 23:55:55 -04:00
David Given 80cb6ba927 Eliminate the RELOH2 relocation, as it never worked --- the address would be
calculated incorrectly because of overflow errors.

Replace it with an extended RELOPPC relocation which understands addis/ori
pairs; add an la pseudoop to the assembler which generates these and the
appropriate relocation. Make good.

--HG--
branch : dtrg-experimental-powerpc-branch
2016-09-17 12:43:15 +02:00
David Given 45a950571d Mostly add support for the experimental and largely broken linuxppc platform.
(Doesn't quite build.)

--HG--
branch : dtrg-experimental-powerpc-branch
2016-09-15 23:12:03 +02:00
David Given f67c98e239 Distributions are a pain --- let's not bother any more. Instead, we just tag
the repository and download a complete snapshot, old and ancient stuff and all.
2016-09-02 23:00:38 +02:00
David Given 88bd7ce126 Remove defunct pmfiles.
--HG--
branch : default-branch
2016-06-03 13:56:50 +02:00
dtrg 4dd1ff6d80 Archival checkin (semi-working code). 2007-11-02 18:56:58 +00:00