Commit graph

10 commits

Author SHA1 Message Date
George Koehler b90c97b00b Teach top to merge or delete "addi sp, sp, X".
This reduces code size, because ncg emits too many "addi sp, sp, X"
instructions when unstacking things.  Now top lowers "addi sp, sp, X"
by lifting other instructions.  This sometimes creates chances to
merge or delete _addi_ instructions.  If no such chance is found, the
_addi_ remains uselessly lowered.

Edit ncg/table to remove something that top now does.

Edit ncg/mach.c to remove some spaces after commas.  This removes a
whitespace difference between *.s and *.so files, because top removes
the space.
2018-01-05 17:55:50 -05:00
George Koehler 720af48d8a Fix lim. Improve lxl, lxa, lor, str, procs with no locals.
_lim_ must use _loe_ (load word external), not _lde_ (load double-word
external).

The new patterns for _lxl_, _lxa_, _lor_, _str_ emit shorter code in
some cases.  The change from GPR_EXPR to REG_EXPR allows moving
LXFRAME to a register variable.

Add more "reusing" clauses.  We have enough registers that ncg almost
never reuses a register, but sometimes it can reuse r3.

In mach.c, emit one fewer instruction in procedures with no locals.
2018-01-04 20:40:35 -05:00
George Koehler 5301cceee3 Declare machine-dependent functions in mach/proto/ncg
This breaks all machines because the declared return type void
disagrees with the implicit return type int (when I compile mach.c
with clang).  Unbreak i386, i80, i86, m68020, powerpc, vc4 by adding
the return types to mach.c.  We don't build any other machines; they
are broken since commit a46ee91 (May 19, 2013) declared void prolog()
and commit fd91851 (Nov 10, 2016) declared void mes(), with both
declarations in mach/proto/ncg/fillem.c.

Also fix mach/vc4/ncg/mach.c where type full is long, so fprintf()
must use "%ld" not "%d" to print full nlocals.
2017-11-13 14:23:44 -05:00
George Koehler 2a92f9bf4d Add a few more error checks and adjustments to reglap.
In util/ncgg, add two more errors for tables using reglap:
 - "Two sizes of reg_float can't be same size"
 - "Missing reg_float of size %d to contain %s"

In mach/proto/ncg, rename macro isregvar_size() to PICK_REGVAR(), so
the macro doesn't look like a function.  This macro sometimes doesn't
evaluate its second argument.

In mach/powerpc/ncg/mach.c, change type of lfs_set to uint32_t, and
change the left shifts from 1U<<regno to (uint32_t)1<<regno, because
1U would be too small for machines with 16-bit int.
2017-10-18 22:00:12 -04:00
George Koehler 7e9348169c Add reglap to ncg. Add 4-byte reg_float to PowerPC ncg.
The new feature "reglap" allows two sizes of floating-point register
variables (reg_float), if each register overlaps a single register of
the other size.  PowerPC ncg uses reglap to define 4-byte instances
of f14 to f31 that overlap the 8-byte instances.

When ncgg sees the definition of fs14("f14")=f14, it removes the
8-byte f14 from its rvnumbers array, and adds the 4-byte fs14 in its
place.  Later, when ncg puts a variable in fs14, if it is an 8-byte
variable, then ncg switches to the 8-byte f14.  The code has
/* reglap */ comments in util/ncgg or #ifdef REGLAP in mach/proto/ncg

reglap became necessary because my commit a20b87c caused PowerPC ego
to allocate reg_float in both 4-byte and 8-byte sizes.
2017-10-14 12:40:04 -04:00
George Koehler 2c266c631a Reorder registers. Fix problem with ret 8.
After c5bb3be, ncg began to allocate regvars from r13 up.  I reorder
the regvars so ncg again allocates them from r31 down.  I also reorder
the other registers.

This exposed a bug in my rule for ret 8.  It was wrong if item %2 was
in r3, because I moved %1 to r3 before %2 to r4.  Fix it by adding
back an individual register class for r3 (called REG3 here, GPR3 in
c5bb3be).

Also fix my typo in mach.c that made a syntax error in assembly.
2017-02-17 19:32:27 -05:00
George Koehler e6df553ebf For PowerPC, never put a reg_float value in a reg_any.
With this type check, I can change the size checks into assertions.
2017-02-16 20:30:17 -05:00
George Koehler cbe5d8640b Add floating-point register variables to PowerPC ncg.
Use f14 to f31 as register variables for 8-byte double-precison.
There are no regvars for 4-byte double precision, because all
regvar(reg_float) must have the same size.  I expect more programs to
prefer 8-byte double precision.

Teach mach/powerpc/ncg/mach.c to emit stfd and lfd instructions to
save and restore 8-byte regvars.  Delay emitting the function prolog
until f_regsave(), so we can use one addi to make stack space for both
local vars and saved registers.  Be more careful with types in mach.c;
don't assume that int and long and full are the same.

In ncg table, add f14 to f31 as register variables, and some rules to
use them.  Add rules to put the result of fadd, fsub, fmul, fdiv, fneg
in a regvar.  Without such rules, the result would go in a scratch
FREG, and we would need fmr to move it to the regvar.  Also add a rule
for pat sdl inreg($1)==reg_float with STACK, so we can unstack the
value directly into the regvar, again without a scratch FREG and fmr.

Edit util/ego/descr/powerpc.descr to tell ego about the new float
regvars.  This might not be working right; ego usually decides against
using any float regvars, so ack -O1 (not running ego) uses the
regvars, but ack -O4 (running ego) doesn't use the regvars.

Beware that ack -mosxppc runs ego using powerpc.descr but -mlinuxppc
and -mqemuppc run ego without a config file (since 8ef7c31).  I am
testing powerpc.descr with a local edit to plat/linuxppc/descr to run
ego with powerpc.descr there, but I did not commit my local edit.
2017-02-15 19:34:07 -05:00
David Given fd91851005 Add enough return types to the K&R C that the ACK builds (on Linux) using clang
now.
2016-11-10 22:04:18 +01:00
dtrg 4dd1ff6d80 Archival checkin (semi-working code). 2007-11-02 18:56:58 +00:00