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Author SHA1 Message Date
David Given
e19850b114 Fix a few c11isms. 2016-10-30 16:51:06 +01:00
David Given
694d1e2deb Merge from default. 2016-10-30 15:59:44 +01:00
David Given
db03785109 Merge pull request #7 from davidgiven/travis 
Use built-in Lua rather than relying on a system one
 2016-10-30 15:59:04 +01:00
David Given
9b6a5e3ae7 Merge from default. 2016-10-30 15:53:26 +01:00
David Given
a5990289a9 Don't allow parallel builds in the top-level makefile. 2016-10-30 15:49:39 +01:00
David Given
613821d771 Old versions of make don't support -r. 2016-10-30 14:28:08 +01:00
David Given
ca5b6e07bb Properly export symbols. 2016-10-29 23:52:17 +02:00
David Given
8c3670483f Get top working with the PowerPC; use it to eliminate useless branches and 
moves.
 2016-10-29 23:37:11 +02:00
David Given
a8c4dac67c Merge from default (merging in George Koehler's PowerPC changes). 2016-10-29 22:40:40 +02:00
David Given
a311e61360 Add support for preserved registers. 2016-10-29 20:22:44 +02:00
David Given
e3ebf986e9 More opcodes. 2016-10-29 13:32:09 +02:00
David Given
1ae8b90238 More opcodes. 2016-10-29 12:55:34 +02:00
David Given
acaae765af Emit negative constants correctly. 2016-10-29 12:55:21 +02:00
David Given
61349389fb More opcodes. sti can now cope with non-standard sizes (really need a better 
fix for this). Hack in crude support for mismatched stack pushes and pops (ints
vs longs).
 2016-10-29 12:48:05 +02:00
David Given
68419da235 Actually, the locals need to go above the spills and saved regs, so fp == lb. 2016-10-29 12:00:33 +02:00
David Given
2cc2c0ae98 Lots more opcodes. Rearrange the stack layout so that fp->ab is a fixed value 
(needed for CHAINFP and FPTOAB). Wire up lfrs to calls via a phi when
necessary, to allow call-bra-lfr chains.
 2016-10-29 11:57:56 +02:00
David Given
bfa65168e2 Don't generate phis if unnecessary (because this breaks the 
critical-edge-splitting guarantee and causes insertion of phi copies to fail).
 2016-10-29 10:55:48 +02:00
David Given
658db4ba71 Mangle label names (turns out that the ACK assembler can't really cope with 
labels that are the same name as instructions...).
 2016-10-27 23:17:16 +02:00
David Given
81525c0f2c Swaps work (at least for registers). More opcodes. Rearrange the stack layout 
so we can always trivially find fp, which lets CHAINFP work.
 2016-10-27 21:50:58 +02:00
David Given
be3dece5af Allow emission of strings containing ". 2016-10-27 21:48:46 +02:00
David Given
51bd3ee4dd Fix bug where some phis weren't being inserted when a given variable definition 
needed more than one phi (due to the dominance frontier containing more than
one basic block).
 2016-10-27 21:40:25 +02:00
David Given
9977ce841a Remove the bytes1, bytes2, bytes4, bytes8 attributes; remove the concept of a 
register 'type'; now use int/float/long/double throughout to identify
registers. Lots of register allocator tweaks and table bugfixes --- we now get
through the dreading Mathlib.mod!
 2016-10-25 23:04:20 +02:00
David Given
45a7f2e993 Phi copies are now inserted as part of type inference. More opcodes. 2016-10-24 22:14:08 +02:00
David Given
111c13e253 More opcodes. 2016-10-24 20:15:22 +02:00
David Given
a4644dee4d More opcodes. 2016-10-24 12:08:40 +02:00
David Given
b22780c075 More opcodes, including the difficult and fairly stupid los/sts. 2016-10-23 22:24:08 +02:00
David Given
abd0cedd61 Massive change to how IR types are handled; we use the type code for matching 
rather than the size. Much cleaner and simpler.
 2016-10-23 21:54:14 +02:00
David Given
b1a3d76d6f Re-re-add the type inference layer, now I know more about how things work. 
Remove that terrible float promotion code.
 2016-10-22 23:04:13 +02:00
David Given
11b0bc1055 More opcodes. 2016-10-22 20:32:51 +02:00
David Given
2d52b1fdaa Remove GETRET; values are now returned directly by CALL. Fix a bug in 
convertstackops which was resulting in duplicate IR groups.
 2016-10-22 12:13:57 +02:00
David Given
ceb938fb3c More opcodes. 2016-10-22 11:26:28 +02:00
David Given
7ae888b754 Hacky workaround the way the Modula-2 compiler generates non-standard sized 
loads and saves. More opcodes; simplified table using macros.
 2016-10-22 10:48:22 +02:00
David Given
90d0661639 Typo fix. 2016-10-22 00:48:55 +02:00
David Given
f851ab83af Better (and more correct) floating point conversions; fif; various new opcodes. 2016-10-22 00:48:26 +02:00
David Given
d535be87b1 fef4 and fef8 is now cleaner, albeit slower; add some more register alias 
stuff.
 2016-10-22 00:02:15 +02:00
David Given
4db402f229 Add (pretty crummy) support for register aliases and static pairs of registers. 
We should have enough functionality now for rather buggy 8-bit ints and
doubles. Rework the table and the platform.c to match.
 2016-10-21 23:31:00 +02:00
David Given
d6984d60ac Add parsing support for register aliases. 2016-10-20 21:47:28 +02:00
David Given
e4fec71f9c Lots more opcodes; better eviction behaviour; better register moves. Lots more 
PowerPC stuff (some working).
 2016-10-19 23:29:05 +02:00
David Given
ffb1eabf45 Floating point promotion is less buggy. 2016-10-19 23:27:53 +02:00
David Given
34c4cfee8f Merge pull request #6 from kernigh/pr-linuxppc 
PowerPC fixes
 2016-10-19 20:39:10 +02:00
George Koehler
99dee0ad24 Remove f14 to f31 from FREG and FSREG. 
This would have happened later, if f14 to f31 became regvar (like r13
to r31 are now).  I am doing it now because ncg is too slow for rules
"with FREG FREG uses FREG".  We use such rules for adf 8 and other EM
instructions that operate on 2 floats.  Like my last commit cfbc537,
this commit speeds ncg by removing choices for register allocation.
 2016-10-18 21:16:47 -04:00
David Given
d5071e7df1 Promote values accessed via NOP. 2016-10-18 23:58:03 +02:00
David Given
5413d47029 '!' tracing is now always emitted; tracing goes to stderr. 2016-10-18 22:32:09 +02:00
David Given
3520704ea8 Add support for floating point constants. 2016-10-18 22:29:42 +02:00
George Koehler
cfbc537959 In powerpc ncg, add a speed hack for sti 8. 
ncg is too slow with this many registers.  A stack pattern "with GPR
GPR GPR" or "with REG REG REG" takes too long to pick registers,
causing ncg 8 to take about 2 seconds on each sti 8.  I introduce
REG_PAIR and there are only 4 such pairs.

For programs that use sti 8 (including C programs that copy 8-byte
structs), this speed hack improves the ncg run from several seconds to
almost instantaneous.

Also add a few COMMENT(...) lines in stacking rules.
 2016-10-17 20:31:59 -04:00
David Given
938fb8c2fc Lots more opcodes. 2016-10-18 00:31:26 +02:00
David Given
4a093b9eba Add li and mr pseudoinstructions. 2016-10-18 00:21:32 +02:00
George Koehler
c7b68033ef Add costs to powerpc instructions. 
Also show how andi., andis., or., set condition codes.
 2016-10-17 14:57:21 -04:00
George Koehler
f33b30ed3c Rewrite .fif8 to avoid powerpc64 fctid 
This fixes the SIGILL (illegal instruction) in startrek when firing
phasers.  The 32-bit processors in my PowerPC Mac and in QEMU don't
have fctid, a 64-bit instruction.

I got the idea from mach/proto/fp/fif8.c to extract the exponent,
clear some bits to get an integer, then subtract the integer from
the original value to get the fraction.
 2016-10-17 00:39:59 -04:00
George Koehler
e2ccc8f942 Add "kills MEMORY" to powerpc sti rules. 
Adjust some of the loi rules (and associated moves) so we can identify
the tokens that must be in MEMORY.

With this commit, I can navigate the Enterprise even if I comment out
my work-around from e22c888.
 2016-10-16 18:13:39 -04:00