calculated incorrectly because of overflow errors. Replace it with an extended RELOPPC relocation which understands addis/ori pairs; add an la pseudoop to the assembler which generates these and the appropriate relocation. Make good. --HG-- branch : dtrg-experimental-powerpc-branch |
||
|---|---|---|
| .. | ||
| aar4.s | ||
| build.lua | ||
| cfi8.s | ||
| cfu8.s | ||
| cif8.s | ||
| csa.s | ||
| csb.s | ||
| cuf8.s | ||
| fd_00000000.s | ||
| fd_80000000.s | ||
| fd_FFFFFFFF.s | ||
| fef8.c | ||
| fif8.s | ||
| los.s | ||
| powerpc.h | ||
| ret.s | ||
| sts.s | ||
| tge.s | ||