| .. |
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aar4.s
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Rename our pseudo-opcode 'la' to 'li32'.
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2016-09-18 17:03:23 -04:00 |
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build.lua
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Get top working with the PowerPC; use it to eliminate useless branches and
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2016-10-29 23:37:11 +02:00 |
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cfi8.s
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Archival checkin (semi-working code).
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2007-11-02 18:56:58 +00:00 |
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cfu8.s
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Rename our pseudo-opcode 'la' to 'li32'.
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2016-09-18 17:03:23 -04:00 |
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cif8.s
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Rename our pseudo-opcode 'la' to 'li32'.
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2016-09-18 17:03:23 -04:00 |
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csa.s
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Archival checkin (semi-working code).
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2007-11-02 18:56:58 +00:00 |
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csb.s
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Archival checkin (semi-working code).
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2007-11-02 18:56:58 +00:00 |
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cuf8.s
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Rename our pseudo-opcode 'la' to 'li32'.
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2016-09-18 17:03:23 -04:00 |
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fd_00000000.s
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Archival checkin (semi-working code).
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2007-11-02 18:56:58 +00:00 |
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fd_80000000.s
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Archival checkin (semi-working code).
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2007-11-02 18:56:58 +00:00 |
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fd_FFFFFFFF.s
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Archival checkin (semi-working code).
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2007-11-02 18:56:58 +00:00 |
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fef8.s
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Rewrite fef 8 in powerpc assembly.
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2016-09-29 15:52:54 -04:00 |
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fif8.s
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Rewrite .fif8 to avoid powerpc64 fctid
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2016-10-17 00:39:59 -04:00 |
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lar4.s
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Add the missing .lar4 and .sar4 for powerpc.
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2016-09-17 23:55:55 -04:00 |
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los.s
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Archival checkin (semi-working code).
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2007-11-02 18:56:58 +00:00 |
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powerpc.h
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Eliminate the RELOH2 relocation, as it never worked --- the address would be
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2016-09-17 12:43:15 +02:00 |
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ret.s
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Archival checkin (semi-working code).
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2007-11-02 18:56:58 +00:00 |
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sar4.s
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Add the missing .lar4 and .sar4 for powerpc.
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2016-09-17 23:55:55 -04:00 |
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sts.s
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Archival checkin (semi-working code).
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2007-11-02 18:56:58 +00:00 |
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tge.s
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Archival checkin (semi-working code).
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2007-11-02 18:56:58 +00:00 |
